drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/export.h>
  31 #include "dm_common.h"
  32 #include "phy_common.h"
  33 #include "../pci.h"
  34 #include "../base.h"
  35
  36 struct dig_t dm_digtable;
  37 static struct ps_t dm_pstable;
  38
  39 #define BT_RSSI_STATE_NORMAL_POWER      BIT_OFFSET_LEN_MASK_32(0, 1)
  40 #define BT_RSSI_STATE_AMDPU_OFF         BIT_OFFSET_LEN_MASK_32(1, 1)
  41 #define BT_RSSI_STATE_SPECIAL_LOW       BIT_OFFSET_LEN_MASK_32(2, 1)
  42 #define BT_RSSI_STATE_BG_EDCA_LOW       BIT_OFFSET_LEN_MASK_32(3, 1)
  43 #define BT_RSSI_STATE_TXPOWER_LOW       BIT_OFFSET_LEN_MASK_32(4, 1)
  44
  45 #define RTLPRIV                 (struct rtl_priv *)
  46 #define GET_UNDECORATED_AVERAGE_RSSI(_priv)     \
  47         ((RTLPRIV(_priv))->mac80211.opmode == \
  48                              NL80211_IFTYPE_ADHOC) ?    \
  49         ((RTLPRIV(_priv))->dm.entry_min_undecoratedsmoothed_pwdb) : \
  50         ((RTLPRIV(_priv))->dm.undecorated_smoothed_pwdb)
  51
  52 static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = {
  53         0x7f8001fe,
  54         0x788001e2,
  55         0x71c001c7,
  56         0x6b8001ae,
  57         0x65400195,
  58         0x5fc0017f,
  59         0x5a400169,
  60         0x55400155,
  61         0x50800142,
  62         0x4c000130,
  63         0x47c0011f,
  64         0x43c0010f,
  65         0x40000100,
  66         0x3c8000f2,
  67         0x390000e4,
  68         0x35c000d7,
  69         0x32c000cb,
  70         0x300000c0,
  71         0x2d4000b5,
  72         0x2ac000ab,
  73         0x288000a2,
  74         0x26000098,
  75         0x24000090,
  76         0x22000088,
  77         0x20000080,
  78         0x1e400079,
  79         0x1c800072,
  80         0x1b00006c,
  81         0x19800066,
  82         0x18000060,
  83         0x16c0005b,
  84         0x15800056,
  85         0x14400051,
  86         0x1300004c,
  87         0x12000048,
  88         0x11000044,
  89         0x10000040,
  90 };
  91
  92 static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
  93         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
  94         {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
  95         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
  96         {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
  97         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
  98         {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
  99         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
 100         {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
 101         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
 102         {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
 103         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
 104         {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
 105         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
 106         {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
 107         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
 108         {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
 109         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
 110         {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
 111         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
 112         {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 113         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 114         {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
 115         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
 116         {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
 117         {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
 118         {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
 119         {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
 120         {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
 121         {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
 122         {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
 123         {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
 124         {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
 125         {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
 126 };
 127
 128 static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
 129         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
 130         {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
 131         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
 132         {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
 133         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
 134         {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
 135         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
 136         {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
 137         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
 138         {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
 139         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
 140         {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
 141         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
 142         {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
 143         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
 144         {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
 145         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
 146         {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
 147         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
 148         {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 149         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 150         {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
 151         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
 152         {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
 153         {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
 154         {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
 155         {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
 156         {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
 157         {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
 158         {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
 159         {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
 160         {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
 161         {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
 162 };
 163
 164 static void rtl92c_dm_diginit(struct ieee80211_hw *hw)
 165 {
 166         dm_digtable.dig_enable_flag = true;
 167         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 168         dm_digtable.cur_igvalue = 0x20;
 169         dm_digtable.pre_igvalue = 0x0;
 170         dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
 171         dm_digtable.presta_connectstate = DIG_STA_DISCONNECT;
 172         dm_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
 173         dm_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
 174         dm_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
 175         dm_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
 176         dm_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
 177         dm_digtable.rx_gain_range_max = DM_DIG_MAX;
 178         dm_digtable.rx_gain_range_min = DM_DIG_MIN;
 179         dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
 180         dm_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
 181         dm_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
 182         dm_digtable.pre_cck_pd_state = CCK_PD_STAGE_MAX;
 183         dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
 184 }
 185
 186 static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)
 187 {
 188         struct rtl_priv *rtlpriv = rtl_priv(hw);
 189         long rssi_val_min = 0;
 190
 191         if ((dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) &&
 192             (dm_digtable.cursta_connectctate == DIG_STA_CONNECT)) {
 193                 if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0)
 194                         rssi_val_min =
 195                             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb >
 196                              rtlpriv->dm.undecorated_smoothed_pwdb) ?
 197                             rtlpriv->dm.undecorated_smoothed_pwdb :
 198                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 199                 else
 200                         rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
 201         } else if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT ||
 202                    dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT) {
 203                 rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
 204         } else if (dm_digtable.curmultista_connectstate ==
 205                    DIG_MULTISTA_CONNECT) {
 206                 rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 207         }
 208
 209         return (u8) rssi_val_min;
 210 }
 211
 212 static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
 213 {
 214         u32 ret_value;
 215         struct rtl_priv *rtlpriv = rtl_priv(hw);
 216         struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
 217
 218         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
 219         falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
 220
 221         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
 222         falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
 223         falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
 224
 225         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
 226         falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
 227         falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
 228             falsealm_cnt->cnt_rate_illegal +
 229             falsealm_cnt->cnt_crc8_fail + falsealm_cnt->cnt_mcs_fail;
 230
 231         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1);
 232         ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
 233         falsealm_cnt->cnt_cck_fail = ret_value;
 234
 235         ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
 236         falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
 237         falsealm_cnt->cnt_all = (falsealm_cnt->cnt_parity_fail +
 238                                  falsealm_cnt->cnt_rate_illegal +
 239                                  falsealm_cnt->cnt_crc8_fail +
 240                                  falsealm_cnt->cnt_mcs_fail +
 241                                  falsealm_cnt->cnt_cck_fail);
 242
 243         rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
 244         rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
 245         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
 246         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
 247
 248         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 249                  "cnt_parity_fail = %d, cnt_rate_illegal = %d, cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
 250                  falsealm_cnt->cnt_parity_fail,
 251                  falsealm_cnt->cnt_rate_illegal,
 252                  falsealm_cnt->cnt_crc8_fail, falsealm_cnt->cnt_mcs_fail);
 253
 254         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 255                  "cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
 256                  falsealm_cnt->cnt_ofdm_fail,
 257                  falsealm_cnt->cnt_cck_fail, falsealm_cnt->cnt_all);
 258 }
 259
 260 static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)
 261 {
 262         struct rtl_priv *rtlpriv = rtl_priv(hw);
 263         u8 value_igi = dm_digtable.cur_igvalue;
 264
 265         if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0)
 266                 value_igi--;
 267         else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1)
 268                 value_igi += 0;
 269         else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH2)
 270                 value_igi++;
 271         else if (rtlpriv->falsealm_cnt.cnt_all >= DM_DIG_FA_TH2)
 272                 value_igi += 2;
 273         if (value_igi > DM_DIG_FA_UPPER)
 274                 value_igi = DM_DIG_FA_UPPER;
 275         else if (value_igi < DM_DIG_FA_LOWER)
 276                 value_igi = DM_DIG_FA_LOWER;
 277         if (rtlpriv->falsealm_cnt.cnt_all > 10000)
 278                 value_igi = 0x32;
 279
 280         dm_digtable.cur_igvalue = value_igi;
 281         rtl92c_dm_write_dig(hw);
 282 }
 283
 284 static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)
 285 {
 286         struct rtl_priv *rtlpriv = rtl_priv(hw);
 287
 288         if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable.fa_highthresh) {
 289                 if ((dm_digtable.backoff_val - 2) <
 290                     dm_digtable.backoff_val_range_min)
 291                         dm_digtable.backoff_val =
 292                             dm_digtable.backoff_val_range_min;
 293                 else
 294                         dm_digtable.backoff_val -= 2;
 295         } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable.fa_lowthresh) {
 296                 if ((dm_digtable.backoff_val + 2) >
 297                     dm_digtable.backoff_val_range_max)
 298                         dm_digtable.backoff_val =
 299                             dm_digtable.backoff_val_range_max;
 300                 else
 301                         dm_digtable.backoff_val += 2;
 302         }
 303
 304         if ((dm_digtable.rssi_val_min + 10 - dm_digtable.backoff_val) >
 305             dm_digtable.rx_gain_range_max)
 306                 dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_max;
 307         else if ((dm_digtable.rssi_val_min + 10 -
 308                   dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
 309                 dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_min;
 310         else
 311                 dm_digtable.cur_igvalue = dm_digtable.rssi_val_min + 10 -
 312                     dm_digtable.backoff_val;
 313
 314         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 315                  "rssi_val_min = %x backoff_val %x\n",
 316                  dm_digtable.rssi_val_min, dm_digtable.backoff_val);
 317
 318         rtl92c_dm_write_dig(hw);
 319 }
 320
 321 static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
 322 {
 323         static u8 initialized; /* initialized to false */
 324         struct rtl_priv *rtlpriv = rtl_priv(hw);
 325         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 326         long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 327         bool multi_sta = false;
 328
 329         if (mac->opmode == NL80211_IFTYPE_ADHOC)
 330                 multi_sta = true;
 331
 332         if (!multi_sta ||
 333             dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
 334                 initialized = false;
 335                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 336                 return;
 337         } else if (initialized == false) {
 338                 initialized = true;
 339                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
 340                 dm_digtable.cur_igvalue = 0x20;
 341                 rtl92c_dm_write_dig(hw);
 342         }
 343
 344         if (dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) {
 345                 if ((rssi_strength < dm_digtable.rssi_lowthresh) &&
 346                     (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {
 347
 348                         if (dm_digtable.dig_ext_port_stage ==
 349                             DIG_EXT_PORT_STAGE_2) {
 350                                 dm_digtable.cur_igvalue = 0x20;
 351                                 rtl92c_dm_write_dig(hw);
 352                         }
 353
 354                         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;
 355                 } else if (rssi_strength > dm_digtable.rssi_highthresh) {
 356                         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;
 357                         rtl92c_dm_ctrl_initgain_by_fa(hw);
 358                 }
 359         } else if (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {
 360                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
 361                 dm_digtable.cur_igvalue = 0x20;
 362                 rtl92c_dm_write_dig(hw);
 363         }
 364
 365         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 366                  "curmultista_connectstate = %x dig_ext_port_stage %x\n",
 367                  dm_digtable.curmultista_connectstate,
 368                  dm_digtable.dig_ext_port_stage);
 369 }
 370
 371 static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)
 372 {
 373         struct rtl_priv *rtlpriv = rtl_priv(hw);
 374
 375         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 376                  "presta_connectstate = %x, cursta_connectctate = %x\n",
 377                  dm_digtable.presta_connectstate,
 378                  dm_digtable.cursta_connectctate);
 379
 380         if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate
 381             || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT
 382             || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
 383
 384                 if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
 385                         dm_digtable.rssi_val_min =
 386                             rtl92c_dm_initial_gain_min_pwdb(hw);
 387                         rtl92c_dm_ctrl_initgain_by_rssi(hw);
 388                 }
 389         } else {
 390                 dm_digtable.rssi_val_min = 0;
 391                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 392                 dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
 393                 dm_digtable.cur_igvalue = 0x20;
 394                 dm_digtable.pre_igvalue = 0;
 395                 rtl92c_dm_write_dig(hw);
 396         }
 397 }
 398
 399 static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
 400 {
 401         struct rtl_priv *rtlpriv = rtl_priv(hw);
 402         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 403
 404         if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
 405                 dm_digtable.rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);
 406
 407                 if (dm_digtable.pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {
 408                         if (dm_digtable.rssi_val_min <= 25)
 409                                 dm_digtable.cur_cck_pd_state =
 410                                     CCK_PD_STAGE_LowRssi;
 411                         else
 412                                 dm_digtable.cur_cck_pd_state =
 413                                     CCK_PD_STAGE_HighRssi;
 414                 } else {
 415                         if (dm_digtable.rssi_val_min <= 20)
 416                                 dm_digtable.cur_cck_pd_state =
 417                                     CCK_PD_STAGE_LowRssi;
 418                         else
 419                                 dm_digtable.cur_cck_pd_state =
 420                                     CCK_PD_STAGE_HighRssi;
 421                 }
 422         } else {
 423                 dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
 424         }
 425
 426         if (dm_digtable.pre_cck_pd_state != dm_digtable.cur_cck_pd_state) {
 427                 if (dm_digtable.cur_cck_pd_state == CCK_PD_STAGE_LowRssi) {
 428                         if (rtlpriv->falsealm_cnt.cnt_cck_fail > 800)
 429                                 dm_digtable.cur_cck_fa_state =
 430                                     CCK_FA_STAGE_High;
 431                         else
 432                                 dm_digtable.cur_cck_fa_state = CCK_FA_STAGE_Low;
 433
 434                         if (dm_digtable.pre_cck_fa_state !=
 435                             dm_digtable.cur_cck_fa_state) {
 436                                 if (dm_digtable.cur_cck_fa_state ==
 437                                     CCK_FA_STAGE_Low)
 438                                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
 439                                                       0x83);
 440                                 else
 441                                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
 442                                                       0xcd);
 443
 444                                 dm_digtable.pre_cck_fa_state =
 445                                     dm_digtable.cur_cck_fa_state;
 446                         }
 447
 448                         rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);
 449
 450                         if (IS_92C_SERIAL(rtlhal->version))
 451                                 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
 452                                               MASKBYTE2, 0xd7);
 453                 } else {
 454                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
 455                         rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);
 456
 457                         if (IS_92C_SERIAL(rtlhal->version))
 458                                 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
 459                                               MASKBYTE2, 0xd3);
 460                 }
 461                 dm_digtable.pre_cck_pd_state = dm_digtable.cur_cck_pd_state;
 462         }
 463
 464         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, "CCKPDStage=%x\n",
 465                  dm_digtable.cur_cck_pd_state);
 466
 467         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, "is92C=%x\n",
 468                  IS_92C_SERIAL(rtlhal->version));
 469 }
 470
 471 static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw)
 472 {
 473         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 474
 475         if (mac->act_scanning)
 476                 return;
 477
 478         if (mac->link_state >= MAC80211_LINKED)
 479                 dm_digtable.cursta_connectctate = DIG_STA_CONNECT;
 480         else
 481                 dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
 482
 483         rtl92c_dm_initial_gain_sta(hw);
 484         rtl92c_dm_initial_gain_multi_sta(hw);
 485         rtl92c_dm_cck_packet_detection_thresh(hw);
 486
 487         dm_digtable.presta_connectstate = dm_digtable.cursta_connectctate;
 488
 489 }
 490
 491 static void rtl92c_dm_dig(struct ieee80211_hw *hw)
 492 {
 493         struct rtl_priv *rtlpriv = rtl_priv(hw);
 494
 495         if (rtlpriv->dm.dm_initialgain_enable == false)
 496                 return;
 497         if (dm_digtable.dig_enable_flag == false)
 498                 return;
 499
 500         rtl92c_dm_ctrl_initgain_by_twoport(hw);
 501
 502 }
 503
 504 static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
 505 {
 506         struct rtl_priv *rtlpriv = rtl_priv(hw);
 507
 508         rtlpriv->dm.dynamic_txpower_enable = false;
 509
 510         rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
 511         rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
 512 }
 513
 514 void rtl92c_dm_write_dig(struct ieee80211_hw *hw)
 515 {
 516         struct rtl_priv *rtlpriv = rtl_priv(hw);
 517
 518         RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
 519                  "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n",
 520                  dm_digtable.cur_igvalue, dm_digtable.pre_igvalue,
 521                  dm_digtable.backoff_val);
 522
 523         dm_digtable.cur_igvalue += 2;
 524         if (dm_digtable.cur_igvalue > 0x3f)
 525                 dm_digtable.cur_igvalue = 0x3f;
 526
 527         if (dm_digtable.pre_igvalue != dm_digtable.cur_igvalue) {
 528                 rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
 529                               dm_digtable.cur_igvalue);
 530                 rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
 531                               dm_digtable.cur_igvalue);
 532
 533                 dm_digtable.pre_igvalue = dm_digtable.cur_igvalue;
 534         }
 535 }
 536 EXPORT_SYMBOL(rtl92c_dm_write_dig);
 537
 538 static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw)
 539 {
 540         struct rtl_priv *rtlpriv = rtl_priv(hw);
 541         long tmpentry_max_pwdb = 0, tmpentry_min_pwdb = 0xff;
 542
 543         u8 h2c_parameter[3] = { 0 };
 544
 545         return;
 546
 547         if (tmpentry_max_pwdb != 0) {
 548                 rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb =
 549                     tmpentry_max_pwdb;
 550         } else {
 551                 rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0;
 552         }
 553
 554         if (tmpentry_min_pwdb != 0xff) {
 555                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb =
 556                     tmpentry_min_pwdb;
 557         } else {
 558                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0;
 559         }
 560
 561         h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF);
 562         h2c_parameter[0] = 0;
 563
 564         rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter);
 565 }
 566
 567 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw)
 568 {
 569         struct rtl_priv *rtlpriv = rtl_priv(hw);
 570         rtlpriv->dm.current_turbo_edca = false;
 571         rtlpriv->dm.is_any_nonbepkts = false;
 572         rtlpriv->dm.is_cur_rdlstate = false;
 573 }
 574 EXPORT_SYMBOL(rtl92c_dm_init_edca_turbo);
 575
 576 static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw)
 577 {
 578         struct rtl_priv *rtlpriv = rtl_priv(hw);
 579         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
 580         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 581
 582         static u64 last_txok_cnt;
 583         static u64 last_rxok_cnt;
 584         static u32 last_bt_edca_ul;
 585         static u32 last_bt_edca_dl;
 586         u64 cur_txok_cnt = 0;
 587         u64 cur_rxok_cnt = 0;
 588         u32 edca_be_ul = 0x5ea42b;
 589         u32 edca_be_dl = 0x5ea42b;
 590         bool bt_change_edca = false;
 591
 592         if ((last_bt_edca_ul != rtlpcipriv->bt_coexist.bt_edca_ul) ||
 593             (last_bt_edca_dl != rtlpcipriv->bt_coexist.bt_edca_dl)) {
 594                 rtlpriv->dm.current_turbo_edca = false;
 595                 last_bt_edca_ul = rtlpcipriv->bt_coexist.bt_edca_ul;
 596                 last_bt_edca_dl = rtlpcipriv->bt_coexist.bt_edca_dl;
 597         }
 598
 599         if (rtlpcipriv->bt_coexist.bt_edca_ul != 0) {
 600                 edca_be_ul = rtlpcipriv->bt_coexist.bt_edca_ul;
 601                 bt_change_edca = true;
 602         }
 603
 604         if (rtlpcipriv->bt_coexist.bt_edca_dl != 0) {
 605                 edca_be_ul = rtlpcipriv->bt_coexist.bt_edca_dl;
 606                 bt_change_edca = true;
 607         }
 608
 609         if (mac->link_state != MAC80211_LINKED) {
 610                 rtlpriv->dm.current_turbo_edca = false;
 611                 return;
 612         }
 613
 614         if ((!mac->ht_enable) && (!rtlpcipriv->bt_coexist.bt_coexistence)) {
 615                 if (!(edca_be_ul & 0xffff0000))
 616                         edca_be_ul |= 0x005e0000;
 617
 618                 if (!(edca_be_dl & 0xffff0000))
 619                         edca_be_dl |= 0x005e0000;
 620         }
 621
 622         if ((bt_change_edca) || ((!rtlpriv->dm.is_any_nonbepkts) &&
 623              (!rtlpriv->dm.disable_framebursting))) {
 624
 625                 cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
 626                 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
 627
 628                 if (cur_rxok_cnt > 4 * cur_txok_cnt) {
 629                         if (!rtlpriv->dm.is_cur_rdlstate ||
 630                             !rtlpriv->dm.current_turbo_edca) {
 631                                 rtl_write_dword(rtlpriv,
 632                                                 REG_EDCA_BE_PARAM,
 633                                                 edca_be_dl);
 634                                 rtlpriv->dm.is_cur_rdlstate = true;
 635                         }
 636                 } else {
 637                         if (rtlpriv->dm.is_cur_rdlstate ||
 638                             !rtlpriv->dm.current_turbo_edca) {
 639                                 rtl_write_dword(rtlpriv,
 640                                                 REG_EDCA_BE_PARAM,
 641                                                 edca_be_ul);
 642                                 rtlpriv->dm.is_cur_rdlstate = false;
 643                         }
 644                 }
 645                 rtlpriv->dm.current_turbo_edca = true;
 646         } else {
 647                 if (rtlpriv->dm.current_turbo_edca) {
 648                         u8 tmp = AC0_BE;
 649                         rtlpriv->cfg->ops->set_hw_reg(hw,
 650                                                       HW_VAR_AC_PARAM,
 651                                                       (u8 *) (&tmp));
 652                         rtlpriv->dm.current_turbo_edca = false;
 653                 }
 654         }
 655
 656         rtlpriv->dm.is_any_nonbepkts = false;
 657         last_txok_cnt = rtlpriv->stats.txbytesunicast;
 658         last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
 659 }
 660
 661 static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
 662                                                              *hw)
 663 {
 664         struct rtl_priv *rtlpriv = rtl_priv(hw);
 665         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 666         struct rtl_phy *rtlphy = &(rtlpriv->phy);
 667         struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
 668         u8 thermalvalue, delta, delta_lck, delta_iqk;
 669         long ele_a, ele_d, temp_cck, val_x, value32;
 670         long val_y, ele_c = 0;
 671         u8 ofdm_index[2], ofdm_index_old[2] = {0, 0};
 672         u8 cck_index = 0, cck_index_old = 0;
 673         int i;
 674         bool is2t = IS_92C_SERIAL(rtlhal->version);
 675         s8 txpwr_level[2] = {0, 0};
 676         u8 ofdm_min_index = 6, rf;
 677
 678         rtlpriv->dm.txpower_trackinginit = true;
 679         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 680                  "rtl92c_dm_txpower_tracking_callback_thermalmeter\n");
 681
 682         thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f);
 683
 684         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 685                  "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
 686                  thermalvalue, rtlpriv->dm.thermalvalue,
 687                  rtlefuse->eeprom_thermalmeter);
 688
 689         rtl92c_phy_ap_calibrate(hw, (thermalvalue -
 690                                      rtlefuse->eeprom_thermalmeter));
 691         if (is2t)
 692                 rf = 2;
 693         else
 694                 rf = 1;
 695
 696         if (thermalvalue) {
 697                 ele_d = rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 698                                       MASKDWORD) & MASKOFDM_D;
 699
 700                 for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
 701                         if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
 702                                 ofdm_index_old[0] = (u8) i;
 703
 704                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 705                                          "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
 706                                          ROFDM0_XATXIQIMBALANCE,
 707                                          ele_d, ofdm_index_old[0]);
 708                                 break;
 709                         }
 710                 }
 711
 712                 if (is2t) {
 713                         ele_d = rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
 714                                               MASKDWORD) & MASKOFDM_D;
 715
 716                         for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
 717                                 if (ele_d == (ofdmswing_table[i] &
 718                                     MASKOFDM_D)) {
 719                                         ofdm_index_old[1] = (u8) i;
 720
 721                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 722                                                  DBG_LOUD,
 723                                                  "Initial pathB ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
 724                                                  ROFDM0_XBTXIQIMBALANCE, ele_d,
 725                                                  ofdm_index_old[1]);
 726                                         break;
 727                                 }
 728                         }
 729                 }
 730
 731                 temp_cck =
 732                     rtl_get_bbreg(hw, RCCK0_TXFILTER2, MASKDWORD) & MASKCCK;
 733
 734                 for (i = 0; i < CCK_TABLE_LENGTH; i++) {
 735                         if (rtlpriv->dm.cck_inch14) {
 736                                 if (memcmp((void *)&temp_cck,
 737                                            (void *)&cckswing_table_ch14[i][2],
 738                                            4) == 0) {
 739                                         cck_index_old = (u8) i;
 740
 741                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 742                                                  DBG_LOUD,
 743                                                  "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
 744                                                  RCCK0_TXFILTER2, temp_cck,
 745                                                  cck_index_old,
 746                                                  rtlpriv->dm.cck_inch14);
 747                                         break;
 748                                 }
 749                         } else {
 750                                 if (memcmp((void *)&temp_cck,
 751                                            (void *)
 752                                            &cckswing_table_ch1ch13[i][2],
 753                                            4) == 0) {
 754                                         cck_index_old = (u8) i;
 755
 756                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 757                                                  DBG_LOUD,
 758                                                  "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch14 %d\n",
 759                                                  RCCK0_TXFILTER2, temp_cck,
 760                                                  cck_index_old,
 761                                                  rtlpriv->dm.cck_inch14);
 762                                         break;
 763                                 }
 764                         }
 765                 }
 766
 767                 if (!rtlpriv->dm.thermalvalue) {
 768                         rtlpriv->dm.thermalvalue =
 769                             rtlefuse->eeprom_thermalmeter;
 770                         rtlpriv->dm.thermalvalue_lck = thermalvalue;
 771                         rtlpriv->dm.thermalvalue_iqk = thermalvalue;
 772                         for (i = 0; i < rf; i++)
 773                                 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
 774                         rtlpriv->dm.cck_index = cck_index_old;
 775                 }
 776
 777                 delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
 778                     (thermalvalue - rtlpriv->dm.thermalvalue) :
 779                     (rtlpriv->dm.thermalvalue - thermalvalue);
 780
 781                 delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
 782                     (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
 783                     (rtlpriv->dm.thermalvalue_lck - thermalvalue);
 784
 785                 delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
 786                     (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
 787                     (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
 788
 789                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 790                          "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
 791                          thermalvalue, rtlpriv->dm.thermalvalue,
 792                          rtlefuse->eeprom_thermalmeter, delta, delta_lck,
 793                          delta_iqk);
 794
 795                 if (delta_lck > 1) {
 796                         rtlpriv->dm.thermalvalue_lck = thermalvalue;
 797                         rtl92c_phy_lc_calibrate(hw);
 798                 }
 799
 800                 if (delta > 0 && rtlpriv->dm.txpower_track_control) {
 801                         if (thermalvalue > rtlpriv->dm.thermalvalue) {
 802                                 for (i = 0; i < rf; i++)
 803                                         rtlpriv->dm.ofdm_index[i] -= delta;
 804                                 rtlpriv->dm.cck_index -= delta;
 805                         } else {
 806                                 for (i = 0; i < rf; i++)
 807                                         rtlpriv->dm.ofdm_index[i] += delta;
 808                                 rtlpriv->dm.cck_index += delta;
 809                         }
 810
 811                         if (is2t) {
 812                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 813                                          "temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, cck_index=0x%x\n",
 814                                          rtlpriv->dm.ofdm_index[0],
 815                                          rtlpriv->dm.ofdm_index[1],
 816                                          rtlpriv->dm.cck_index);
 817                         } else {
 818                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 819                                          "temp OFDM_A_index=0x%x, cck_index=0x%x\n",
 820                                          rtlpriv->dm.ofdm_index[0],
 821                                          rtlpriv->dm.cck_index);
 822                         }
 823
 824                         if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
 825                                 for (i = 0; i < rf; i++)
 826                                         ofdm_index[i] =
 827                                             rtlpriv->dm.ofdm_index[i]
 828                                             + 1;
 829                                 cck_index = rtlpriv->dm.cck_index + 1;
 830                         } else {
 831                                 for (i = 0; i < rf; i++)
 832                                         ofdm_index[i] =
 833                                             rtlpriv->dm.ofdm_index[i];
 834                                 cck_index = rtlpriv->dm.cck_index;
 835                         }
 836
 837                         for (i = 0; i < rf; i++) {
 838                                 if (txpwr_level[i] >= 0 &&
 839                                     txpwr_level[i] <= 26) {
 840                                         if (thermalvalue >
 841                                             rtlefuse->eeprom_thermalmeter) {
 842                                                 if (delta < 5)
 843                                                         ofdm_index[i] -= 1;
 844
 845                                                 else
 846                                                         ofdm_index[i] -= 2;
 847                                         } else if (delta > 5 && thermalvalue <
 848                                                    rtlefuse->
 849                                                    eeprom_thermalmeter) {
 850                                                 ofdm_index[i] += 1;
 851                                         }
 852                                 } else if (txpwr_level[i] >= 27 &&
 853                                            txpwr_level[i] <= 32
 854                                            && thermalvalue >
 855                                            rtlefuse->eeprom_thermalmeter) {
 856                                         if (delta < 5)
 857                                                 ofdm_index[i] -= 1;
 858
 859                                         else
 860                                                 ofdm_index[i] -= 2;
 861                                 } else if (txpwr_level[i] >= 32 &&
 862                                            txpwr_level[i] <= 38 &&
 863                                            thermalvalue >
 864                                            rtlefuse->eeprom_thermalmeter
 865                                            && delta > 5) {
 866                                         ofdm_index[i] -= 1;
 867                                 }
 868                         }
 869
 870                         if (txpwr_level[i] >= 0 && txpwr_level[i] <= 26) {
 871                                 if (thermalvalue >
 872                                     rtlefuse->eeprom_thermalmeter) {
 873                                         if (delta < 5)
 874                                                 cck_index -= 1;
 875
 876                                         else
 877                                                 cck_index -= 2;
 878                                 } else if (delta > 5 && thermalvalue <
 879                                            rtlefuse->eeprom_thermalmeter) {
 880                                         cck_index += 1;
 881                                 }
 882                         } else if (txpwr_level[i] >= 27 &&
 883                                    txpwr_level[i] <= 32 &&
 884                                    thermalvalue >
 885                                    rtlefuse->eeprom_thermalmeter) {
 886                                 if (delta < 5)
 887                                         cck_index -= 1;
 888
 889                                 else
 890                                         cck_index -= 2;
 891                         } else if (txpwr_level[i] >= 32 &&
 892                                    txpwr_level[i] <= 38 &&
 893                                    thermalvalue > rtlefuse->eeprom_thermalmeter
 894                                    && delta > 5) {
 895                                 cck_index -= 1;
 896                         }
 897
 898                         for (i = 0; i < rf; i++) {
 899                                 if (ofdm_index[i] > OFDM_TABLE_SIZE - 1)
 900                                         ofdm_index[i] = OFDM_TABLE_SIZE - 1;
 901
 902                                 else if (ofdm_index[i] < ofdm_min_index)
 903                                         ofdm_index[i] = ofdm_min_index;
 904                         }
 905
 906                         if (cck_index > CCK_TABLE_SIZE - 1)
 907                                 cck_index = CCK_TABLE_SIZE - 1;
 908                         else if (cck_index < 0)
 909                                 cck_index = 0;
 910
 911                         if (is2t) {
 912                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 913                                          "new OFDM_A_index=0x%x, OFDM_B_index=0x%x, cck_index=0x%x\n",
 914                                          ofdm_index[0], ofdm_index[1],
 915                                          cck_index);
 916                         } else {
 917                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 918                                          "new OFDM_A_index=0x%x, cck_index=0x%x\n",
 919                                          ofdm_index[0], cck_index);
 920                         }
 921                 }
 922
 923                 if (rtlpriv->dm.txpower_track_control && delta != 0) {
 924                         ele_d =
 925                             (ofdmswing_table[ofdm_index[0]] & 0xFFC00000) >> 22;
 926                         val_x = rtlphy->reg_e94;
 927                         val_y = rtlphy->reg_e9c;
 928
 929                         if (val_x != 0) {
 930                                 if ((val_x & 0x00000200) != 0)
 931                                         val_x = val_x | 0xFFFFFC00;
 932                                 ele_a = ((val_x * ele_d) >> 8) & 0x000003FF;
 933
 934                                 if ((val_y & 0x00000200) != 0)
 935                                         val_y = val_y | 0xFFFFFC00;
 936                                 ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
 937
 938                                 value32 = (ele_d << 22) |
 939                                     ((ele_c & 0x3F) << 16) | ele_a;
 940
 941                                 rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 942                                               MASKDWORD, value32);
 943
 944                                 value32 = (ele_c & 0x000003C0) >> 6;
 945                                 rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
 946                                               value32);
 947
 948                                 value32 = ((val_x * ele_d) >> 7) & 0x01;
 949                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
 950                                               BIT(31), value32);
 951
 952                                 value32 = ((val_y * ele_d) >> 7) & 0x01;
 953                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
 954                                               BIT(29), value32);
 955                         } else {
 956                                 rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 957                                               MASKDWORD,
 958                                               ofdmswing_table[ofdm_index[0]]);
 959
 960                                 rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
 961                                               0x00);
 962                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
 963                                               BIT(31) | BIT(29), 0x00);
 964                         }
 965
 966                         if (!rtlpriv->dm.cck_inch14) {
 967                                 rtl_write_byte(rtlpriv, 0xa22,
 968                                                cckswing_table_ch1ch13[cck_index]
 969                                                [0]);
 970                                 rtl_write_byte(rtlpriv, 0xa23,
 971                                                cckswing_table_ch1ch13[cck_index]
 972                                                [1]);
 973                                 rtl_write_byte(rtlpriv, 0xa24,
 974                                                cckswing_table_ch1ch13[cck_index]
 975                                                [2]);
 976                                 rtl_write_byte(rtlpriv, 0xa25,
 977                                                cckswing_table_ch1ch13[cck_index]
 978                                                [3]);
 979                                 rtl_write_byte(rtlpriv, 0xa26,
 980                                                cckswing_table_ch1ch13[cck_index]
 981                                                [4]);
 982                                 rtl_write_byte(rtlpriv, 0xa27,
 983                                                cckswing_table_ch1ch13[cck_index]
 984                                                [5]);
 985                                 rtl_write_byte(rtlpriv, 0xa28,
 986                                                cckswing_table_ch1ch13[cck_index]
 987                                                [6]);
 988                                 rtl_write_byte(rtlpriv, 0xa29,
 989                                                cckswing_table_ch1ch13[cck_index]
 990                                                [7]);
 991                         } else {
 992                                 rtl_write_byte(rtlpriv, 0xa22,
 993                                                cckswing_table_ch14[cck_index]
 994                                                [0]);
 995                                 rtl_write_byte(rtlpriv, 0xa23,
 996                                                cckswing_table_ch14[cck_index]
 997                                                [1]);
 998                                 rtl_write_byte(rtlpriv, 0xa24,
 999                                                cckswing_table_ch14[cck_index]
1000                                                [2]);
1001                                 rtl_write_byte(rtlpriv, 0xa25,
1002                                                cckswing_table_ch14[cck_index]
1003                                                [3]);
1004                                 rtl_write_byte(rtlpriv, 0xa26,
1005                                                cckswing_table_ch14[cck_index]
1006                                                [4]);
1007                                 rtl_write_byte(rtlpriv, 0xa27,
1008                                                cckswing_table_ch14[cck_index]
1009                                                [5]);
1010                                 rtl_write_byte(rtlpriv, 0xa28,
1011                                                cckswing_table_ch14[cck_index]
1012                                                [6]);
1013                                 rtl_write_byte(rtlpriv, 0xa29,
1014                                                cckswing_table_ch14[cck_index]
1015                                                [7]);
1016                         }
1017
1018                         if (is2t) {
1019                                 ele_d = (ofdmswing_table[ofdm_index[1]] &
1020                                          0xFFC00000) >> 22;
1021
1022                                 val_x = rtlphy->reg_eb4;
1023                                 val_y = rtlphy->reg_ebc;
1024
1025                                 if (val_x != 0) {
1026                                         if ((val_x & 0x00000200) != 0)
1027                                                 val_x = val_x | 0xFFFFFC00;
1028                                         ele_a = ((val_x * ele_d) >> 8) &
1029                                             0x000003FF;
1030
1031                                         if ((val_y & 0x00000200) != 0)
1032                                                 val_y = val_y | 0xFFFFFC00;
1033                                         ele_c = ((val_y * ele_d) >> 8) &
1034                                             0x00003FF;
1035
1036                                         value32 = (ele_d << 22) |
1037                                             ((ele_c & 0x3F) << 16) | ele_a;
1038                                         rtl_set_bbreg(hw,
1039                                                       ROFDM0_XBTXIQIMBALANCE,
1040                                                       MASKDWORD, value32);
1041
1042                                         value32 = (ele_c & 0x000003C0) >> 6;
1043                                         rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
1044                                                       MASKH4BITS, value32);
1045
1046                                         value32 = ((val_x * ele_d) >> 7) & 0x01;
1047                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1048                                                       BIT(27), value32);
1049
1050                                         value32 = ((val_y * ele_d) >> 7) & 0x01;
1051                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1052                                                       BIT(25), value32);
1053                                 } else {
1054                                         rtl_set_bbreg(hw,
1055                                                       ROFDM0_XBTXIQIMBALANCE,
1056                                                       MASKDWORD,
1057                                                       ofdmswing_table[ofdm_index
1058                                                                       [1]]);
1059                                         rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
1060                                                       MASKH4BITS, 0x00);
1061                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1062                                                       BIT(27) | BIT(25), 0x00);
1063                                 }
1064
1065                         }
1066                 }
1067
1068                 if (delta_iqk > 3) {
1069                         rtlpriv->dm.thermalvalue_iqk = thermalvalue;
1070                         rtl92c_phy_iq_calibrate(hw, false);
1071                 }
1072
1073                 if (rtlpriv->dm.txpower_track_control)
1074                         rtlpriv->dm.thermalvalue = thermalvalue;
1075         }
1076
1077         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n");
1078
1079 }
1080
1081 static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
1082                                                 struct ieee80211_hw *hw)
1083 {
1084         struct rtl_priv *rtlpriv = rtl_priv(hw);
1085
1086         rtlpriv->dm.txpower_tracking = true;
1087         rtlpriv->dm.txpower_trackinginit = false;
1088
1089         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1090                  "pMgntInfo->txpower_tracking = %d\n",
1091                  rtlpriv->dm.txpower_tracking);
1092 }
1093
1094 static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
1095 {
1096         rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw);
1097 }
1098
1099 static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw *hw)
1100 {
1101         rtl92c_dm_txpower_tracking_callback_thermalmeter(hw);
1102 }
1103
1104 static void rtl92c_dm_check_txpower_tracking_thermal_meter(
1105                                                 struct ieee80211_hw *hw)
1106 {
1107         struct rtl_priv *rtlpriv = rtl_priv(hw);
1108         static u8 tm_trigger;
1109
1110         if (!rtlpriv->dm.txpower_tracking)
1111                 return;
1112
1113         if (!tm_trigger) {
1114                 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, RFREG_OFFSET_MASK,
1115                               0x60);
1116                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1117                          "Trigger 92S Thermal Meter!!\n");
1118                 tm_trigger = 1;
1119                 return;
1120         } else {
1121                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1122                          "Schedule TxPowerTracking direct call!!\n");
1123                 rtl92c_dm_txpower_tracking_directcall(hw);
1124                 tm_trigger = 0;
1125         }
1126 }
1127
1128 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw)
1129 {
1130         rtl92c_dm_check_txpower_tracking_thermal_meter(hw);
1131 }
1132 EXPORT_SYMBOL(rtl92c_dm_check_txpower_tracking);
1133
1134 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
1135 {
1136         struct rtl_priv *rtlpriv = rtl_priv(hw);
1137         struct rate_adaptive *p_ra = &(rtlpriv->ra);
1138
1139         p_ra->ratr_state = DM_RATR_STA_INIT;
1140         p_ra->pre_ratr_state = DM_RATR_STA_INIT;
1141
1142         if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
1143                 rtlpriv->dm.useramask = true;
1144         else
1145                 rtlpriv->dm.useramask = false;
1146
1147 }
1148 EXPORT_SYMBOL(rtl92c_dm_init_rate_adaptive_mask);
1149
1150 static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
1151 {
1152         struct rtl_priv *rtlpriv = rtl_priv(hw);
1153         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1154         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1155         struct rate_adaptive *p_ra = &(rtlpriv->ra);
1156         u32 low_rssithresh_for_ra, high_rssithresh_for_ra;
1157         struct ieee80211_sta *sta = NULL;
1158
1159         if (is_hal_stop(rtlhal)) {
1160                 RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1161                          "<---- driver is going to unload\n");
1162                 return;
1163         }
1164
1165         if (!rtlpriv->dm.useramask) {
1166                 RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1167                          "<---- driver does not control rate adaptive mask\n");
1168                 return;
1169         }
1170
1171         if (mac->link_state == MAC80211_LINKED &&
1172             mac->opmode == NL80211_IFTYPE_STATION) {
1173                 switch (p_ra->pre_ratr_state) {
1174                 case DM_RATR_STA_HIGH:
1175                         high_rssithresh_for_ra = 50;
1176                         low_rssithresh_for_ra = 20;
1177                         break;
1178                 case DM_RATR_STA_MIDDLE:
1179                         high_rssithresh_for_ra = 55;
1180                         low_rssithresh_for_ra = 20;
1181                         break;
1182                 case DM_RATR_STA_LOW:
1183                         high_rssithresh_for_ra = 50;
1184                         low_rssithresh_for_ra = 25;
1185                         break;
1186                 default:
1187                         high_rssithresh_for_ra = 50;
1188                         low_rssithresh_for_ra = 20;
1189                         break;
1190                 }
1191
1192                 if (rtlpriv->dm.undecorated_smoothed_pwdb >
1193                     (long)high_rssithresh_for_ra)
1194                         p_ra->ratr_state = DM_RATR_STA_HIGH;
1195                 else if (rtlpriv->dm.undecorated_smoothed_pwdb >
1196                          (long)low_rssithresh_for_ra)
1197                         p_ra->ratr_state = DM_RATR_STA_MIDDLE;
1198                 else
1199                         p_ra->ratr_state = DM_RATR_STA_LOW;
1200
1201                 if (p_ra->pre_ratr_state != p_ra->ratr_state) {
1202                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, "RSSI = %ld\n",
1203                                  rtlpriv->dm.undecorated_smoothed_pwdb);
1204                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1205                                  "RSSI_LEVEL = %d\n", p_ra->ratr_state);
1206                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1207                                  "PreState = %d, CurState = %d\n",
1208                                  p_ra->pre_ratr_state, p_ra->ratr_state);
1209
1210                         /* Only the PCI card uses sta in the update rate table
1211                          * callback routine */
1212                         if (rtlhal->interface == INTF_PCI) {
1213                                 rcu_read_lock();
1214                                 sta = ieee80211_find_sta(mac->vif, mac->bssid);
1215                         }
1216                         rtlpriv->cfg->ops->update_rate_tbl(hw, sta,
1217                                         p_ra->ratr_state);
1218
1219                         p_ra->pre_ratr_state = p_ra->ratr_state;
1220                         if (rtlhal->interface == INTF_PCI)
1221                                 rcu_read_unlock();
1222                 }
1223         }
1224 }
1225
1226 static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw *hw)
1227 {
1228         dm_pstable.pre_ccastate = CCA_MAX;
1229         dm_pstable.cur_ccasate = CCA_MAX;
1230         dm_pstable.pre_rfstate = RF_MAX;
1231         dm_pstable.cur_rfstate = RF_MAX;
1232         dm_pstable.rssi_val_min = 0;
1233 }
1234
1235 void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)
1236 {
1237         static u8 initialize;
1238         static u32 reg_874, reg_c70, reg_85c, reg_a74;
1239
1240         if (initialize == 0) {
1241                 reg_874 = (rtl_get_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1242                                          MASKDWORD) & 0x1CC000) >> 14;
1243
1244                 reg_c70 = (rtl_get_bbreg(hw, ROFDM0_AGCPARAMETER1,
1245                                          MASKDWORD) & BIT(3)) >> 3;
1246
1247                 reg_85c = (rtl_get_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
1248                                          MASKDWORD) & 0xFF000000) >> 24;
1249
1250                 reg_a74 = (rtl_get_bbreg(hw, 0xa74, MASKDWORD) & 0xF000) >> 12;
1251
1252                 initialize = 1;
1253         }
1254
1255         if (!bforce_in_normal) {
1256                 if (dm_pstable.rssi_val_min != 0) {
1257                         if (dm_pstable.pre_rfstate == RF_NORMAL) {
1258                                 if (dm_pstable.rssi_val_min >= 30)
1259                                         dm_pstable.cur_rfstate = RF_SAVE;
1260                                 else
1261                                         dm_pstable.cur_rfstate = RF_NORMAL;
1262                         } else {
1263                                 if (dm_pstable.rssi_val_min <= 25)
1264                                         dm_pstable.cur_rfstate = RF_NORMAL;
1265                                 else
1266                                         dm_pstable.cur_rfstate = RF_SAVE;
1267                         }
1268                 } else {
1269                         dm_pstable.cur_rfstate = RF_MAX;
1270                 }
1271         } else {
1272                 dm_pstable.cur_rfstate = RF_NORMAL;
1273         }
1274
1275         if (dm_pstable.pre_rfstate != dm_pstable.cur_rfstate) {
1276                 if (dm_pstable.cur_rfstate == RF_SAVE) {
1277                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1278                                       0x1C0000, 0x2);
1279                         rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);
1280                         rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
1281                                       0xFF000000, 0x63);
1282                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1283                                       0xC000, 0x2);
1284                         rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3);
1285                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
1286                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x1);
1287                 } else {
1288                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1289                                       0x1CC000, reg_874);
1290                         rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3),
1291                                       reg_c70);
1292                         rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000,
1293                                       reg_85c);
1294                         rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74);
1295                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
1296                 }
1297
1298                 dm_pstable.pre_rfstate = dm_pstable.cur_rfstate;
1299         }
1300 }
1301 EXPORT_SYMBOL(rtl92c_dm_rf_saving);
1302
1303 static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)
1304 {
1305         struct rtl_priv *rtlpriv = rtl_priv(hw);
1306         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1307         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1308
1309         if (((mac->link_state == MAC80211_NOLINK)) &&
1310             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
1311                 dm_pstable.rssi_val_min = 0;
1312                 RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, "Not connected to any\n");
1313         }
1314
1315         if (mac->link_state == MAC80211_LINKED) {
1316                 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
1317                         dm_pstable.rssi_val_min =
1318                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1319                         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1320                                  "AP Client PWDB = 0x%lx\n",
1321                                  dm_pstable.rssi_val_min);
1322                 } else {
1323                         dm_pstable.rssi_val_min =
1324                             rtlpriv->dm.undecorated_smoothed_pwdb;
1325                         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1326                                  "STA Default Port PWDB = 0x%lx\n",
1327                                  dm_pstable.rssi_val_min);
1328                 }
1329         } else {
1330                 dm_pstable.rssi_val_min =
1331                     rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1332
1333                 RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1334                          "AP Ext Port PWDB = 0x%lx\n",
1335                          dm_pstable.rssi_val_min);
1336         }
1337
1338         if (IS_92C_SERIAL(rtlhal->version))
1339                 ;/* rtl92c_dm_1r_cca(hw); */
1340         else
1341                 rtl92c_dm_rf_saving(hw, false);
1342 }
1343
1344 void rtl92c_dm_init(struct ieee80211_hw *hw)
1345 {
1346         struct rtl_priv *rtlpriv = rtl_priv(hw);
1347
1348         rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
1349         rtl92c_dm_diginit(hw);
1350         rtl92c_dm_init_dynamic_txpower(hw);
1351         rtl92c_dm_init_edca_turbo(hw);
1352         rtl92c_dm_init_rate_adaptive_mask(hw);
1353         rtl92c_dm_initialize_txpower_tracking(hw);
1354         rtl92c_dm_init_dynamic_bb_powersaving(hw);
1355 }
1356 EXPORT_SYMBOL(rtl92c_dm_init);
1357
1358 void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
1359 {
1360         struct rtl_priv *rtlpriv = rtl_priv(hw);
1361         struct rtl_phy *rtlphy = &(rtlpriv->phy);
1362         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1363         long undecorated_smoothed_pwdb;
1364
1365         if (!rtlpriv->dm.dynamic_txpower_enable)
1366                 return;
1367
1368         if (rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
1369                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
1370                 return;
1371         }
1372
1373         if ((mac->link_state < MAC80211_LINKED) &&
1374             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
1375                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
1376                          "Not connected to any\n");
1377
1378                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
1379
1380                 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
1381                 return;
1382         }
1383
1384         if (mac->link_state >= MAC80211_LINKED) {
1385                 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
1386                         undecorated_smoothed_pwdb =
1387                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1388                         RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1389                                  "AP Client PWDB = 0x%lx\n",
1390                                  undecorated_smoothed_pwdb);
1391                 } else {
1392                         undecorated_smoothed_pwdb =
1393                             rtlpriv->dm.undecorated_smoothed_pwdb;
1394                         RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1395                                  "STA Default Port PWDB = 0x%lx\n",
1396                                  undecorated_smoothed_pwdb);
1397                 }
1398         } else {
1399                 undecorated_smoothed_pwdb =
1400                     rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1401
1402                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1403                          "AP Ext Port PWDB = 0x%lx\n",
1404                          undecorated_smoothed_pwdb);
1405         }
1406
1407         if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
1408                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
1409                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1410                          "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
1411         } else if ((undecorated_smoothed_pwdb <
1412                     (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
1413                    (undecorated_smoothed_pwdb >=
1414                     TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
1415
1416                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
1417                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1418                          "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
1419         } else if (undecorated_smoothed_pwdb <
1420                    (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
1421                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
1422                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1423                          "TXHIGHPWRLEVEL_NORMAL\n");
1424         }
1425
1426         if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
1427                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1428                          "PHY_SetTxPowerLevel8192S() Channel = %d\n",
1429                          rtlphy->current_channel);
1430                 rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
1431         }
1432
1433         rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
1434 }
1435
1436 void rtl92c_dm_watchdog(struct ieee80211_hw *hw)
1437 {
1438         struct rtl_priv *rtlpriv = rtl_priv(hw);
1439         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1440         bool fw_current_inpsmode = false;
1441         bool fw_ps_awake = true;
1442
1443         rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS,
1444                                       (u8 *) (&fw_current_inpsmode));
1445         rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FWLPS_RF_ON,
1446                                       (u8 *) (&fw_ps_awake));
1447
1448         if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
1449                                              fw_ps_awake)
1450             && (!ppsc->rfchange_inprogress)) {
1451                 rtl92c_dm_pwdb_monitor(hw);
1452                 rtl92c_dm_dig(hw);
1453                 rtl92c_dm_false_alarm_counter_statistics(hw);
1454                 rtl92c_dm_dynamic_bb_powersaving(hw);
1455                 rtl92c_dm_dynamic_txpower(hw);
1456                 rtl92c_dm_check_txpower_tracking(hw);
1457                 rtl92c_dm_refresh_rate_adaptive_mask(hw);
1458                 rtl92c_dm_bt_coexist(hw);
1459                 rtl92c_dm_check_edca_turbo(hw);
1460         }
1461 }
1462 EXPORT_SYMBOL(rtl92c_dm_watchdog);
1463
1464 u8 rtl92c_bt_rssi_state_change(struct ieee80211_hw *hw)
1465 {
1466         struct rtl_priv *rtlpriv = rtl_priv(hw);
1467         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1468         long undecorated_smoothed_pwdb;
1469         u8 curr_bt_rssi_state = 0x00;
1470
1471         if (rtlpriv->mac80211.link_state == MAC80211_LINKED) {
1472                 undecorated_smoothed_pwdb =
1473                                  GET_UNDECORATED_AVERAGE_RSSI(rtlpriv);
1474         } else {
1475                 if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)
1476                         undecorated_smoothed_pwdb = 100;
1477                 else
1478                         undecorated_smoothed_pwdb =
1479                                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1480         }
1481
1482         /* Check RSSI to determine HighPower/NormalPower state for
1483          * BT coexistence. */
1484         if (undecorated_smoothed_pwdb >= 67)
1485                 curr_bt_rssi_state &= (~BT_RSSI_STATE_NORMAL_POWER);
1486         else if (undecorated_smoothed_pwdb < 62)
1487                 curr_bt_rssi_state |= BT_RSSI_STATE_NORMAL_POWER;
1488
1489         /* Check RSSI to determine AMPDU setting for BT coexistence. */
1490         if (undecorated_smoothed_pwdb >= 40)
1491                 curr_bt_rssi_state &= (~BT_RSSI_STATE_AMDPU_OFF);
1492         else if (undecorated_smoothed_pwdb <= 32)
1493                 curr_bt_rssi_state |= BT_RSSI_STATE_AMDPU_OFF;
1494
1495         /* Marked RSSI state. It will be used to determine BT coexistence
1496          * setting later. */
1497         if (undecorated_smoothed_pwdb < 35)
1498                 curr_bt_rssi_state |=  BT_RSSI_STATE_SPECIAL_LOW;
1499         else
1500                 curr_bt_rssi_state &= (~BT_RSSI_STATE_SPECIAL_LOW);
1501
1502         /* Set Tx Power according to BT status. */
1503         if (undecorated_smoothed_pwdb >= 30)
1504                 curr_bt_rssi_state |=  BT_RSSI_STATE_TXPOWER_LOW;
1505         else if (undecorated_smoothed_pwdb < 25)
1506                 curr_bt_rssi_state &= (~BT_RSSI_STATE_TXPOWER_LOW);
1507
1508         /* Check BT state related to BT_Idle in B/G mode. */
1509         if (undecorated_smoothed_pwdb < 15)
1510                 curr_bt_rssi_state |=  BT_RSSI_STATE_BG_EDCA_LOW;
1511         else
1512                 curr_bt_rssi_state &= (~BT_RSSI_STATE_BG_EDCA_LOW);
1513
1514         if (curr_bt_rssi_state != rtlpcipriv->bt_coexist.bt_rssi_state) {
1515                 rtlpcipriv->bt_coexist.bt_rssi_state = curr_bt_rssi_state;
1516                 return true;
1517         } else {
1518                 return false;
1519         }
1520 }
1521 EXPORT_SYMBOL(rtl92c_bt_rssi_state_change);
1522
1523 static bool rtl92c_bt_state_change(struct ieee80211_hw *hw)
1524 {
1525         struct rtl_priv *rtlpriv = rtl_priv(hw);
1526         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1527
1528         u32 polling, ratio_tx, ratio_pri;
1529         u32 bt_tx, bt_pri;
1530         u8 bt_state;
1531         u8 cur_service_type;
1532
1533         if (rtlpriv->mac80211.link_state < MAC80211_LINKED)
1534                 return false;
1535
1536         bt_state = rtl_read_byte(rtlpriv, 0x4fd);
1537         bt_tx = rtl_read_dword(rtlpriv, 0x488);
1538         bt_tx = bt_tx & 0x00ffffff;
1539         bt_pri = rtl_read_dword(rtlpriv, 0x48c);
1540         bt_pri = bt_pri & 0x00ffffff;
1541         polling = rtl_read_dword(rtlpriv, 0x490);
1542
1543         if (bt_tx == 0xffffffff && bt_pri == 0xffffffff &&
1544             polling == 0xffffffff && bt_state == 0xff)
1545                 return false;
1546
1547         bt_state &= BIT_OFFSET_LEN_MASK_32(0, 1);
1548         if (bt_state != rtlpcipriv->bt_coexist.bt_cur_state) {
1549                 rtlpcipriv->bt_coexist.bt_cur_state = bt_state;
1550
1551                 if (rtlpcipriv->bt_coexist.reg_bt_sco == 3) {
1552                         rtlpcipriv->bt_coexist.bt_service = BT_IDLE;
1553
1554                         bt_state = bt_state |
1555                           ((rtlpcipriv->bt_coexist.bt_ant_isolation == 1) ?
1556                           0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1557                           BIT_OFFSET_LEN_MASK_32(2, 1);
1558                         rtl_write_byte(rtlpriv, 0x4fd, bt_state);
1559                 }
1560                 return true;
1561         }
1562
1563         ratio_tx = bt_tx * 1000 / polling;
1564         ratio_pri = bt_pri * 1000 / polling;
1565         rtlpcipriv->bt_coexist.ratio_tx = ratio_tx;
1566         rtlpcipriv->bt_coexist.ratio_pri = ratio_pri;
1567
1568         if (bt_state && rtlpcipriv->bt_coexist.reg_bt_sco == 3) {
1569
1570                 if ((ratio_tx < 30)  && (ratio_pri < 30))
1571                         cur_service_type = BT_IDLE;
1572                 else if ((ratio_pri > 110) && (ratio_pri < 250))
1573                         cur_service_type = BT_SCO;
1574                 else if ((ratio_tx >= 200) && (ratio_pri >= 200))
1575                         cur_service_type = BT_BUSY;
1576                 else if ((ratio_tx >= 350) && (ratio_tx < 500))
1577                         cur_service_type = BT_OTHERBUSY;
1578                 else if (ratio_tx >= 500)
1579                         cur_service_type = BT_PAN;
1580                 else
1581                         cur_service_type = BT_OTHER_ACTION;
1582
1583                 if (cur_service_type != rtlpcipriv->bt_coexist.bt_service) {
1584                         rtlpcipriv->bt_coexist.bt_service = cur_service_type;
1585                         bt_state = bt_state |
1586                            ((rtlpcipriv->bt_coexist.bt_ant_isolation == 1) ?
1587                            0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1588                            ((rtlpcipriv->bt_coexist.bt_service != BT_IDLE) ?
1589                            0 : BIT_OFFSET_LEN_MASK_32(2, 1));
1590
1591                         /* Add interrupt migration when bt is not ini
1592                          * idle state (no traffic). */
1593                         if (rtlpcipriv->bt_coexist.bt_service != BT_IDLE) {
1594                                 rtl_write_word(rtlpriv, 0x504, 0x0ccc);
1595                                 rtl_write_byte(rtlpriv, 0x506, 0x54);
1596                                 rtl_write_byte(rtlpriv, 0x507, 0x54);
1597                         } else {
1598                                 rtl_write_byte(rtlpriv, 0x506, 0x00);
1599                                 rtl_write_byte(rtlpriv, 0x507, 0x00);
1600                         }
1601
1602                         rtl_write_byte(rtlpriv, 0x4fd, bt_state);
1603                         return true;
1604                 }
1605         }
1606
1607         return false;
1608
1609 }
1610
1611 static bool rtl92c_bt_wifi_connect_change(struct ieee80211_hw *hw)
1612 {
1613         struct rtl_priv *rtlpriv = rtl_priv(hw);
1614         static bool media_connect;
1615
1616         if (rtlpriv->mac80211.link_state < MAC80211_LINKED) {
1617                 media_connect = false;
1618         } else {
1619                 if (!media_connect) {
1620                         media_connect = true;
1621                         return true;
1622                 }
1623                 media_connect = true;
1624         }
1625
1626         return false;
1627 }
1628
1629 static void rtl92c_bt_set_normal(struct ieee80211_hw *hw)
1630 {
1631         struct rtl_priv *rtlpriv = rtl_priv(hw);
1632         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1633
1634
1635         if (rtlpcipriv->bt_coexist.bt_service == BT_OTHERBUSY) {
1636                 rtlpcipriv->bt_coexist.bt_edca_ul = 0x5ea72b;
1637                 rtlpcipriv->bt_coexist.bt_edca_dl = 0x5ea72b;
1638         } else if (rtlpcipriv->bt_coexist.bt_service == BT_BUSY) {
1639                 rtlpcipriv->bt_coexist.bt_edca_ul = 0x5eb82f;
1640                 rtlpcipriv->bt_coexist.bt_edca_dl = 0x5eb82f;
1641         } else if (rtlpcipriv->bt_coexist.bt_service == BT_SCO) {
1642                 if (rtlpcipriv->bt_coexist.ratio_tx > 160) {
1643                         rtlpcipriv->bt_coexist.bt_edca_ul = 0x5ea72f;
1644                         rtlpcipriv->bt_coexist.bt_edca_dl = 0x5ea72f;
1645                 } else {
1646                         rtlpcipriv->bt_coexist.bt_edca_ul = 0x5ea32b;
1647                         rtlpcipriv->bt_coexist.bt_edca_dl = 0x5ea42b;
1648                 }
1649         } else {
1650                 rtlpcipriv->bt_coexist.bt_edca_ul = 0;
1651                 rtlpcipriv->bt_coexist.bt_edca_dl = 0;
1652         }
1653
1654         if ((rtlpcipriv->bt_coexist.bt_service != BT_IDLE) &&
1655              (rtlpriv->mac80211.mode == WIRELESS_MODE_G ||
1656              (rtlpriv->mac80211.mode == (WIRELESS_MODE_G | WIRELESS_MODE_B))) &&
1657              (rtlpcipriv->bt_coexist.bt_rssi_state &
1658              BT_RSSI_STATE_BG_EDCA_LOW)) {
1659                 rtlpcipriv->bt_coexist.bt_edca_ul = 0x5eb82b;
1660                 rtlpcipriv->bt_coexist.bt_edca_dl = 0x5eb82b;
1661         }
1662 }
1663
1664 static void rtl92c_bt_ant_isolation(struct ieee80211_hw *hw)
1665 {
1666         struct rtl_priv *rtlpriv = rtl_priv(hw);
1667         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1668
1669
1670         /* Only enable HW BT coexist when BT in "Busy" state. */
1671         if (rtlpriv->mac80211.vendor == PEER_CISCO &&
1672             rtlpcipriv->bt_coexist.bt_service == BT_OTHER_ACTION) {
1673                 rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0);
1674         } else {
1675                 if ((rtlpcipriv->bt_coexist.bt_service == BT_BUSY) &&
1676                     (rtlpcipriv->bt_coexist.bt_rssi_state &
1677                      BT_RSSI_STATE_NORMAL_POWER)) {
1678                         rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0);
1679                 } else if ((rtlpcipriv->bt_coexist.bt_service ==
1680                             BT_OTHER_ACTION) && (rtlpriv->mac80211.mode <
1681                             WIRELESS_MODE_N_24G) &&
1682                             (rtlpcipriv->bt_coexist.bt_rssi_state &
1683                             BT_RSSI_STATE_SPECIAL_LOW)) {
1684                         rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0);
1685                 } else if (rtlpcipriv->bt_coexist.bt_service == BT_PAN) {
1686                         rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0x00);
1687                 } else {
1688                         rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0x00);
1689                 }
1690         }
1691
1692         if (rtlpcipriv->bt_coexist.bt_service == BT_PAN)
1693                 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x10100);
1694         else
1695                 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x0);
1696
1697         if (rtlpcipriv->bt_coexist.bt_rssi_state &
1698             BT_RSSI_STATE_NORMAL_POWER) {
1699                 rtl92c_bt_set_normal(hw);
1700         } else {
1701                 rtlpcipriv->bt_coexist.bt_edca_ul = 0;
1702                 rtlpcipriv->bt_coexist.bt_edca_dl = 0;
1703         }
1704
1705         if (rtlpcipriv->bt_coexist.bt_service != BT_IDLE) {
1706                 rtlpriv->cfg->ops->set_rfreg(hw,
1707                                  RF90_PATH_A,
1708                                  0x1e,
1709                                  0xf0, 0xf);
1710         } else {
1711                 rtlpriv->cfg->ops->set_rfreg(hw,
1712                      RF90_PATH_A, 0x1e, 0xf0,
1713                      rtlpcipriv->bt_coexist.bt_rfreg_origin_1e);
1714         }
1715
1716         if (!rtlpriv->dm.dynamic_txpower_enable) {
1717                 if (rtlpcipriv->bt_coexist.bt_service != BT_IDLE) {
1718                         if (rtlpcipriv->bt_coexist.bt_rssi_state &
1719                                 BT_RSSI_STATE_TXPOWER_LOW) {
1720                                 rtlpriv->dm.dynamic_txhighpower_lvl =
1721                                                         TXHIGHPWRLEVEL_BT2;
1722                         } else {
1723                                 rtlpriv->dm.dynamic_txhighpower_lvl =
1724                                         TXHIGHPWRLEVEL_BT1;
1725                         }
1726                 } else {
1727                         rtlpriv->dm.dynamic_txhighpower_lvl =
1728                                 TXHIGHPWRLEVEL_NORMAL;
1729                 }
1730                 rtl92c_phy_set_txpower_level(hw,
1731                         rtlpriv->phy.current_channel);
1732         }
1733 }
1734
1735 static void rtl92c_check_bt_change(struct ieee80211_hw *hw)
1736 {
1737         struct rtl_priv *rtlpriv = rtl_priv(hw);
1738         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1739
1740         if (rtlpcipriv->bt_coexist.bt_cur_state) {
1741                 if (rtlpcipriv->bt_coexist.bt_ant_isolation)
1742                         rtl92c_bt_ant_isolation(hw);
1743         } else {
1744                 rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0x00);
1745                 rtlpriv->cfg->ops->set_rfreg(hw, RF90_PATH_A, 0x1e, 0xf0,
1746                                 rtlpcipriv->bt_coexist.bt_rfreg_origin_1e);
1747
1748                 rtlpcipriv->bt_coexist.bt_edca_ul = 0;
1749                 rtlpcipriv->bt_coexist.bt_edca_dl = 0;
1750         }
1751 }
1752
1753 void rtl92c_dm_bt_coexist(struct ieee80211_hw *hw)
1754 {
1755         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1756
1757         bool wifi_connect_change;
1758         bool bt_state_change;
1759         bool rssi_state_change;
1760
1761         if ((rtlpcipriv->bt_coexist.bt_coexistence) &&
1762              (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) {
1763
1764                 wifi_connect_change = rtl92c_bt_wifi_connect_change(hw);
1765                 bt_state_change = rtl92c_bt_state_change(hw);
1766                 rssi_state_change = rtl92c_bt_rssi_state_change(hw);
1767
1768                 if (wifi_connect_change || bt_state_change || rssi_state_change)
1769                         rtl92c_check_bt_change(hw);
1770         }
1771 }
1772 EXPORT_SYMBOL(rtl92c_dm_bt_coexist);