drivers/rtc/rtc-ds1307.c

   1 /*
   2  * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
   3  *
   4  *  Copyright (C) 2005 James Chapman (ds1337 core)
   5  *  Copyright (C) 2006 David Brownell
   6  *  Copyright (C) 2009 Matthias Fuchs (rx8025 support)
   7  *  Copyright (C) 2012 Bertrand Achard (nvram access fixes)
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/bcd.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/rtc/ds1307.h>
  19 #include <linux/rtc.h>
  20 #include <linux/slab.h>
  21 #include <linux/string.h>
  22 #include <linux/hwmon.h>
  23 #include <linux/hwmon-sysfs.h>
  24 #include <linux/clk-provider.h>
  25
  26 /*
  27  * We can't determine type by probing, but if we expect pre-Linux code
  28  * to have set the chip up as a clock (turning on the oscillator and
  29  * setting the date and time), Linux can ignore the non-clock features.
  30  * That's a natural job for a factory or repair bench.
  31  */
  32 enum ds_type {
  33         ds_1307,
  34         ds_1337,
  35         ds_1338,
  36         ds_1339,
  37         ds_1340,
  38         ds_1388,
  39         ds_3231,
  40         m41t00,
  41         mcp794xx,
  42         rx_8025,
  43         last_ds_type /* always last */
  44         /* rs5c372 too?  different address... */
  45 };
  46
  47
  48 /* RTC registers don't differ much, except for the century flag */
  49 #define DS1307_REG_SECS         0x00    /* 00-59 */
  50 #       define DS1307_BIT_CH            0x80
  51 #       define DS1340_BIT_nEOSC         0x80
  52 #       define MCP794XX_BIT_ST          0x80
  53 #define DS1307_REG_MIN          0x01    /* 00-59 */
  54 #define DS1307_REG_HOUR         0x02    /* 00-23, or 1-12{am,pm} */
  55 #       define DS1307_BIT_12HR          0x40    /* in REG_HOUR */
  56 #       define DS1307_BIT_PM            0x20    /* in REG_HOUR */
  57 #       define DS1340_BIT_CENTURY_EN    0x80    /* in REG_HOUR */
  58 #       define DS1340_BIT_CENTURY       0x40    /* in REG_HOUR */
  59 #define DS1307_REG_WDAY         0x03    /* 01-07 */
  60 #       define MCP794XX_BIT_VBATEN      0x08
  61 #define DS1307_REG_MDAY         0x04    /* 01-31 */
  62 #define DS1307_REG_MONTH        0x05    /* 01-12 */
  63 #       define DS1337_BIT_CENTURY       0x80    /* in REG_MONTH */
  64 #define DS1307_REG_YEAR         0x06    /* 00-99 */
  65
  66 /*
  67  * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  68  * start at 7, and they differ a LOT. Only control and status matter for
  69  * basic RTC date and time functionality; be careful using them.
  70  */
  71 #define DS1307_REG_CONTROL      0x07            /* or ds1338 */
  72 #       define DS1307_BIT_OUT           0x80
  73 #       define DS1338_BIT_OSF           0x20
  74 #       define DS1307_BIT_SQWE          0x10
  75 #       define DS1307_BIT_RS1           0x02
  76 #       define DS1307_BIT_RS0           0x01
  77 #define DS1337_REG_CONTROL      0x0e
  78 #       define DS1337_BIT_nEOSC         0x80
  79 #       define DS1339_BIT_BBSQI         0x20
  80 #       define DS3231_BIT_BBSQW         0x40 /* same as BBSQI */
  81 #       define DS1337_BIT_RS2           0x10
  82 #       define DS1337_BIT_RS1           0x08
  83 #       define DS1337_BIT_INTCN         0x04
  84 #       define DS1337_BIT_A2IE          0x02
  85 #       define DS1337_BIT_A1IE          0x01
  86 #define DS1340_REG_CONTROL      0x07
  87 #       define DS1340_BIT_OUT           0x80
  88 #       define DS1340_BIT_FT            0x40
  89 #       define DS1340_BIT_CALIB_SIGN    0x20
  90 #       define DS1340_M_CALIBRATION     0x1f
  91 #define DS1340_REG_FLAG         0x09
  92 #       define DS1340_BIT_OSF           0x80
  93 #define DS1337_REG_STATUS       0x0f
  94 #       define DS1337_BIT_OSF           0x80
  95 #       define DS3231_BIT_EN32KHZ       0x08
  96 #       define DS1337_BIT_A2I           0x02
  97 #       define DS1337_BIT_A1I           0x01
  98 #define DS1339_REG_ALARM1_SECS  0x07
  99
 100 #define DS13XX_TRICKLE_CHARGER_MAGIC    0xa0
 101
 102 #define RX8025_REG_CTRL1        0x0e
 103 #       define RX8025_BIT_2412          0x20
 104 #define RX8025_REG_CTRL2        0x0f
 105 #       define RX8025_BIT_PON           0x10
 106 #       define RX8025_BIT_VDET          0x40
 107 #       define RX8025_BIT_XST           0x20
 108
 109
 110 struct ds1307 {
 111         u8                      offset; /* register's offset */
 112         u8                      regs[11];
 113         u16                     nvram_offset;
 114         struct bin_attribute    *nvram;
 115         enum ds_type            type;
 116         unsigned long           flags;
 117 #define HAS_NVRAM       0               /* bit 0 == sysfs file active */
 118 #define HAS_ALARM       1               /* bit 1 == irq claimed */
 119         struct i2c_client       *client;
 120         struct rtc_device       *rtc;
 121         s32 (*read_block_data)(const struct i2c_client *client, u8 command,
 122                                u8 length, u8 *values);
 123         s32 (*write_block_data)(const struct i2c_client *client, u8 command,
 124                                 u8 length, const u8 *values);
 125 #ifdef CONFIG_COMMON_CLK
 126         struct clk_hw           clks[2];
 127 #endif
 128 };
 129
 130 struct chip_desc {
 131         unsigned                alarm:1;
 132         u16                     nvram_offset;
 133         u16                     nvram_size;
 134         u16                     trickle_charger_reg;
 135         u8                      trickle_charger_setup;
 136         u8                      (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
 137 };
 138
 139 static u8 do_trickle_setup_ds1339(struct i2c_client *,
 140                                   uint32_t ohms, bool diode);
 141
 142 static struct chip_desc chips[last_ds_type] = {
 143         [ds_1307] = {
 144                 .nvram_offset   = 8,
 145                 .nvram_size     = 56,
 146         },
 147         [ds_1337] = {
 148                 .alarm          = 1,
 149         },
 150         [ds_1338] = {
 151                 .nvram_offset   = 8,
 152                 .nvram_size     = 56,
 153         },
 154         [ds_1339] = {
 155                 .alarm          = 1,
 156                 .trickle_charger_reg = 0x10,
 157                 .do_trickle_setup = &do_trickle_setup_ds1339,
 158         },
 159         [ds_1340] = {
 160                 .trickle_charger_reg = 0x08,
 161         },
 162         [ds_1388] = {
 163                 .trickle_charger_reg = 0x0a,
 164         },
 165         [ds_3231] = {
 166                 .alarm          = 1,
 167         },
 168         [mcp794xx] = {
 169                 .alarm          = 1,
 170                 /* this is battery backed SRAM */
 171                 .nvram_offset   = 0x20,
 172                 .nvram_size     = 0x40,
 173         },
 174 };
 175
 176 static const struct i2c_device_id ds1307_id[] = {
 177         { "ds1307", ds_1307 },
 178         { "ds1337", ds_1337 },
 179         { "ds1338", ds_1338 },
 180         { "ds1339", ds_1339 },
 181         { "ds1388", ds_1388 },
 182         { "ds1340", ds_1340 },
 183         { "ds3231", ds_3231 },
 184         { "m41t00", m41t00 },
 185         { "mcp7940x", mcp794xx },
 186         { "mcp7941x", mcp794xx },
 187         { "pt7c4338", ds_1307 },
 188         { "rx8025", rx_8025 },
 189         { }
 190 };
 191 MODULE_DEVICE_TABLE(i2c, ds1307_id);
 192
 193 /*----------------------------------------------------------------------*/
 194
 195 #define BLOCK_DATA_MAX_TRIES 10
 196
 197 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
 198                                        u8 command, u8 length, u8 *values)
 199 {
 200         s32 i, data;
 201
 202         for (i = 0; i < length; i++) {
 203                 data = i2c_smbus_read_byte_data(client, command + i);
 204                 if (data < 0)
 205                         return data;
 206                 values[i] = data;
 207         }
 208         return i;
 209 }
 210
 211 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
 212                                   u8 length, u8 *values)
 213 {
 214         u8 oldvalues[255];
 215         s32 ret;
 216         int tries = 0;
 217
 218         dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
 219         ret = ds1307_read_block_data_once(client, command, length, values);
 220         if (ret < 0)
 221                 return ret;
 222         do {
 223                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 224                         dev_err(&client->dev,
 225                                 "ds1307_read_block_data failed\n");
 226                         return -EIO;
 227                 }
 228                 memcpy(oldvalues, values, length);
 229                 ret = ds1307_read_block_data_once(client, command, length,
 230                                                   values);
 231                 if (ret < 0)
 232                         return ret;
 233         } while (memcmp(oldvalues, values, length));
 234         return length;
 235 }
 236
 237 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
 238                                    u8 length, const u8 *values)
 239 {
 240         u8 currvalues[255];
 241         int tries = 0;
 242
 243         dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
 244         do {
 245                 s32 i, ret;
 246
 247                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 248                         dev_err(&client->dev,
 249                                 "ds1307_write_block_data failed\n");
 250                         return -EIO;
 251                 }
 252                 for (i = 0; i < length; i++) {
 253                         ret = i2c_smbus_write_byte_data(client, command + i,
 254                                                         values[i]);
 255                         if (ret < 0)
 256                                 return ret;
 257                 }
 258                 ret = ds1307_read_block_data_once(client, command, length,
 259                                                   currvalues);
 260                 if (ret < 0)
 261                         return ret;
 262         } while (memcmp(currvalues, values, length));
 263         return length;
 264 }
 265
 266 /*----------------------------------------------------------------------*/
 267
 268 /* These RTC devices are not designed to be connected to a SMbus adapter.
 269    SMbus limits block operations length to 32 bytes, whereas it's not
 270    limited on I2C buses. As a result, accesses may exceed 32 bytes;
 271    in that case, split them into smaller blocks */
 272
 273 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
 274                                 u8 command, u8 length, const u8 *values)
 275 {
 276         u8 suboffset = 0;
 277
 278         if (length <= I2C_SMBUS_BLOCK_MAX) {
 279                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 280                                         command, length, values);
 281                 if (retval < 0)
 282                         return retval;
 283                 return length;
 284         }
 285
 286         while (suboffset < length) {
 287                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 288                                 command + suboffset,
 289                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 290                                 values + suboffset);
 291                 if (retval < 0)
 292                         return retval;
 293
 294                 suboffset += I2C_SMBUS_BLOCK_MAX;
 295         }
 296         return length;
 297 }
 298
 299 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
 300                                 u8 command, u8 length, u8 *values)
 301 {
 302         u8 suboffset = 0;
 303
 304         if (length <= I2C_SMBUS_BLOCK_MAX)
 305                 return i2c_smbus_read_i2c_block_data(client,
 306                                         command, length, values);
 307
 308         while (suboffset < length) {
 309                 s32 retval = i2c_smbus_read_i2c_block_data(client,
 310                                 command + suboffset,
 311                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 312                                 values + suboffset);
 313                 if (retval < 0)
 314                         return retval;
 315
 316                 suboffset += I2C_SMBUS_BLOCK_MAX;
 317         }
 318         return length;
 319 }
 320
 321 /*----------------------------------------------------------------------*/
 322
 323 /*
 324  * The ds1337 and ds1339 both have two alarms, but we only use the first
 325  * one (with a "seconds" field).  For ds1337 we expect nINTA is our alarm
 326  * signal; ds1339 chips have only one alarm signal.
 327  */
 328 static irqreturn_t ds1307_irq(int irq, void *dev_id)
 329 {
 330         struct i2c_client       *client = dev_id;
 331         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 332         struct mutex            *lock = &ds1307->rtc->ops_lock;
 333         int                     stat, control;
 334
 335         mutex_lock(lock);
 336         stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
 337         if (stat < 0)
 338                 goto out;
 339
 340         if (stat & DS1337_BIT_A1I) {
 341                 stat &= ~DS1337_BIT_A1I;
 342                 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
 343
 344                 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 345                 if (control < 0)
 346                         goto out;
 347
 348                 control &= ~DS1337_BIT_A1IE;
 349                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 350
 351                 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 352         }
 353
 354 out:
 355         mutex_unlock(lock);
 356
 357         return IRQ_HANDLED;
 358 }
 359
 360 /*----------------------------------------------------------------------*/
 361
 362 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
 363 {
 364         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 365         int             tmp;
 366
 367         /* read the RTC date and time registers all at once */
 368         tmp = ds1307->read_block_data(ds1307->client,
 369                 ds1307->offset, 7, ds1307->regs);
 370         if (tmp != 7) {
 371                 dev_err(dev, "%s error %d\n", "read", tmp);
 372                 return -EIO;
 373         }
 374
 375         dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
 376
 377         t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
 378         t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
 379         tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
 380         t->tm_hour = bcd2bin(tmp);
 381         t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
 382         t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
 383         tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
 384         t->tm_mon = bcd2bin(tmp) - 1;
 385
 386         /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
 387         t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
 388
 389         dev_dbg(dev, "%s secs=%d, mins=%d, "
 390                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 391                 "read", t->tm_sec, t->tm_min,
 392                 t->tm_hour, t->tm_mday,
 393                 t->tm_mon, t->tm_year, t->tm_wday);
 394
 395         /* initial clock setting can be undefined */
 396         return rtc_valid_tm(t);
 397 }
 398
 399 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
 400 {
 401         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 402         int             result;
 403         int             tmp;
 404         u8              *buf = ds1307->regs;
 405
 406         dev_dbg(dev, "%s secs=%d, mins=%d, "
 407                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 408                 "write", t->tm_sec, t->tm_min,
 409                 t->tm_hour, t->tm_mday,
 410                 t->tm_mon, t->tm_year, t->tm_wday);
 411
 412         buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
 413         buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
 414         buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
 415         buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
 416         buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
 417         buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
 418
 419         /* assume 20YY not 19YY */
 420         tmp = t->tm_year - 100;
 421         buf[DS1307_REG_YEAR] = bin2bcd(tmp);
 422
 423         switch (ds1307->type) {
 424         case ds_1337:
 425         case ds_1339:
 426         case ds_3231:
 427                 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
 428                 break;
 429         case ds_1340:
 430                 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
 431                                 | DS1340_BIT_CENTURY;
 432                 break;
 433         case mcp794xx:
 434                 /*
 435                  * these bits were cleared when preparing the date/time
 436                  * values and need to be set again before writing the
 437                  * buffer out to the device.
 438                  */
 439                 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
 440                 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
 441                 break;
 442         default:
 443                 break;
 444         }
 445
 446         dev_dbg(dev, "%s: %7ph\n", "write", buf);
 447
 448         result = ds1307->write_block_data(ds1307->client,
 449                 ds1307->offset, 7, buf);
 450         if (result < 0) {
 451                 dev_err(dev, "%s error %d\n", "write", result);
 452                 return result;
 453         }
 454         return 0;
 455 }
 456
 457 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 458 {
 459         struct i2c_client       *client = to_i2c_client(dev);
 460         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 461         int                     ret;
 462
 463         if (!test_bit(HAS_ALARM, &ds1307->flags))
 464                 return -EINVAL;
 465
 466         /* read all ALARM1, ALARM2, and status registers at once */
 467         ret = ds1307->read_block_data(client,
 468                         DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
 469         if (ret != 9) {
 470                 dev_err(dev, "%s error %d\n", "alarm read", ret);
 471                 return -EIO;
 472         }
 473
 474         dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
 475                 &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]);
 476
 477         /*
 478          * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
 479          * and that all four fields are checked matches
 480          */
 481         t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
 482         t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
 483         t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
 484         t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
 485
 486         /* ... and status */
 487         t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
 488         t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
 489
 490         dev_dbg(dev, "%s secs=%d, mins=%d, "
 491                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 492                 "alarm read", t->time.tm_sec, t->time.tm_min,
 493                 t->time.tm_hour, t->time.tm_mday,
 494                 t->enabled, t->pending);
 495
 496         return 0;
 497 }
 498
 499 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 500 {
 501         struct i2c_client       *client = to_i2c_client(dev);
 502         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 503         unsigned char           *buf = ds1307->regs;
 504         u8                      control, status;
 505         int                     ret;
 506
 507         if (!test_bit(HAS_ALARM, &ds1307->flags))
 508                 return -EINVAL;
 509
 510         dev_dbg(dev, "%s secs=%d, mins=%d, "
 511                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 512                 "alarm set", t->time.tm_sec, t->time.tm_min,
 513                 t->time.tm_hour, t->time.tm_mday,
 514                 t->enabled, t->pending);
 515
 516         /* read current status of both alarms and the chip */
 517         ret = ds1307->read_block_data(client,
 518                         DS1339_REG_ALARM1_SECS, 9, buf);
 519         if (ret != 9) {
 520                 dev_err(dev, "%s error %d\n", "alarm write", ret);
 521                 return -EIO;
 522         }
 523         control = ds1307->regs[7];
 524         status = ds1307->regs[8];
 525
 526         dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
 527                 &ds1307->regs[0], &ds1307->regs[4], control, status);
 528
 529         /* set ALARM1, using 24 hour and day-of-month modes */
 530         buf[0] = bin2bcd(t->time.tm_sec);
 531         buf[1] = bin2bcd(t->time.tm_min);
 532         buf[2] = bin2bcd(t->time.tm_hour);
 533         buf[3] = bin2bcd(t->time.tm_mday);
 534
 535         /* set ALARM2 to non-garbage */
 536         buf[4] = 0;
 537         buf[5] = 0;
 538         buf[6] = 0;
 539
 540         /* disable alarms */
 541         buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
 542         buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
 543
 544         ret = ds1307->write_block_data(client,
 545                         DS1339_REG_ALARM1_SECS, 9, buf);
 546         if (ret < 0) {
 547                 dev_err(dev, "can't set alarm time\n");
 548                 return ret;
 549         }
 550
 551         /* optionally enable ALARM1 */
 552         if (t->enabled) {
 553                 dev_dbg(dev, "alarm IRQ armed\n");
 554                 buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
 555                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
 556         }
 557
 558         return 0;
 559 }
 560
 561 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
 562 {
 563         struct i2c_client       *client = to_i2c_client(dev);
 564         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 565         int                     ret;
 566
 567         if (!test_bit(HAS_ALARM, &ds1307->flags))
 568                 return -ENOTTY;
 569
 570         ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 571         if (ret < 0)
 572                 return ret;
 573
 574         if (enabled)
 575                 ret |= DS1337_BIT_A1IE;
 576         else
 577                 ret &= ~DS1337_BIT_A1IE;
 578
 579         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
 580         if (ret < 0)
 581                 return ret;
 582
 583         return 0;
 584 }
 585
 586 static const struct rtc_class_ops ds13xx_rtc_ops = {
 587         .read_time      = ds1307_get_time,
 588         .set_time       = ds1307_set_time,
 589         .read_alarm     = ds1337_read_alarm,
 590         .set_alarm      = ds1337_set_alarm,
 591         .alarm_irq_enable = ds1307_alarm_irq_enable,
 592 };
 593
 594 /*----------------------------------------------------------------------*/
 595
 596 /*
 597  * Alarm support for mcp794xx devices.
 598  */
 599
 600 #define MCP794XX_REG_WEEKDAY            0x3
 601 #define MCP794XX_REG_WEEKDAY_WDAY_MASK  0x7
 602 #define MCP794XX_REG_CONTROL            0x07
 603 #       define MCP794XX_BIT_ALM0_EN     0x10
 604 #       define MCP794XX_BIT_ALM1_EN     0x20
 605 #define MCP794XX_REG_ALARM0_BASE        0x0a
 606 #define MCP794XX_REG_ALARM0_CTRL        0x0d
 607 #define MCP794XX_REG_ALARM1_BASE        0x11
 608 #define MCP794XX_REG_ALARM1_CTRL        0x14
 609 #       define MCP794XX_BIT_ALMX_IF     (1 << 3)
 610 #       define MCP794XX_BIT_ALMX_C0     (1 << 4)
 611 #       define MCP794XX_BIT_ALMX_C1     (1 << 5)
 612 #       define MCP794XX_BIT_ALMX_C2     (1 << 6)
 613 #       define MCP794XX_BIT_ALMX_POL    (1 << 7)
 614 #       define MCP794XX_MSK_ALMX_MATCH  (MCP794XX_BIT_ALMX_C0 | \
 615                                          MCP794XX_BIT_ALMX_C1 | \
 616                                          MCP794XX_BIT_ALMX_C2)
 617
 618 static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
 619 {
 620         struct i2c_client       *client = dev_id;
 621         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 622         struct mutex            *lock = &ds1307->rtc->ops_lock;
 623         int reg, ret;
 624
 625         mutex_lock(lock);
 626
 627         /* Check and clear alarm 0 interrupt flag. */
 628         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
 629         if (reg < 0)
 630                 goto out;
 631         if (!(reg & MCP794XX_BIT_ALMX_IF))
 632                 goto out;
 633         reg &= ~MCP794XX_BIT_ALMX_IF;
 634         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
 635         if (ret < 0)
 636                 goto out;
 637
 638         /* Disable alarm 0. */
 639         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 640         if (reg < 0)
 641                 goto out;
 642         reg &= ~MCP794XX_BIT_ALM0_EN;
 643         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 644         if (ret < 0)
 645                 goto out;
 646
 647         rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 648
 649 out:
 650         mutex_unlock(lock);
 651
 652         return IRQ_HANDLED;
 653 }
 654
 655 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 656 {
 657         struct i2c_client *client = to_i2c_client(dev);
 658         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 659         u8 *regs = ds1307->regs;
 660         int ret;
 661
 662         if (!test_bit(HAS_ALARM, &ds1307->flags))
 663                 return -EINVAL;
 664
 665         /* Read control and alarm 0 registers. */
 666         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 667         if (ret < 0)
 668                 return ret;
 669
 670         t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
 671
 672         /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
 673         t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
 674         t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
 675         t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
 676         t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
 677         t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
 678         t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
 679         t->time.tm_year = -1;
 680         t->time.tm_yday = -1;
 681         t->time.tm_isdst = -1;
 682
 683         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 684                 "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
 685                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 686                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
 687                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
 688                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
 689                 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
 690
 691         return 0;
 692 }
 693
 694 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 695 {
 696         struct i2c_client *client = to_i2c_client(dev);
 697         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 698         unsigned char *regs = ds1307->regs;
 699         int ret;
 700
 701         if (!test_bit(HAS_ALARM, &ds1307->flags))
 702                 return -EINVAL;
 703
 704         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 705                 "enabled=%d pending=%d\n", __func__,
 706                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 707                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
 708                 t->enabled, t->pending);
 709
 710         /* Read control and alarm 0 registers. */
 711         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 712         if (ret < 0)
 713                 return ret;
 714
 715         /* Set alarm 0, using 24-hour and day-of-month modes. */
 716         regs[3] = bin2bcd(t->time.tm_sec);
 717         regs[4] = bin2bcd(t->time.tm_min);
 718         regs[5] = bin2bcd(t->time.tm_hour);
 719         regs[6] = bin2bcd(t->time.tm_wday + 1);
 720         regs[7] = bin2bcd(t->time.tm_mday);
 721         regs[8] = bin2bcd(t->time.tm_mon + 1);
 722
 723         /* Clear the alarm 0 interrupt flag. */
 724         regs[6] &= ~MCP794XX_BIT_ALMX_IF;
 725         /* Set alarm match: second, minute, hour, day, date, month. */
 726         regs[6] |= MCP794XX_MSK_ALMX_MATCH;
 727         /* Disable interrupt. We will not enable until completely programmed */
 728         regs[0] &= ~MCP794XX_BIT_ALM0_EN;
 729
 730         ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 731         if (ret < 0)
 732                 return ret;
 733
 734         if (!t->enabled)
 735                 return 0;
 736         regs[0] |= MCP794XX_BIT_ALM0_EN;
 737         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
 738 }
 739
 740 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
 741 {
 742         struct i2c_client *client = to_i2c_client(dev);
 743         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 744         int reg;
 745
 746         if (!test_bit(HAS_ALARM, &ds1307->flags))
 747                 return -EINVAL;
 748
 749         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 750         if (reg < 0)
 751                 return reg;
 752
 753         if (enabled)
 754                 reg |= MCP794XX_BIT_ALM0_EN;
 755         else
 756                 reg &= ~MCP794XX_BIT_ALM0_EN;
 757
 758         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 759 }
 760
 761 static const struct rtc_class_ops mcp794xx_rtc_ops = {
 762         .read_time      = ds1307_get_time,
 763         .set_time       = ds1307_set_time,
 764         .read_alarm     = mcp794xx_read_alarm,
 765         .set_alarm      = mcp794xx_set_alarm,
 766         .alarm_irq_enable = mcp794xx_alarm_irq_enable,
 767 };
 768
 769 /*----------------------------------------------------------------------*/
 770
 771 static ssize_t
 772 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
 773                 struct bin_attribute *attr,
 774                 char *buf, loff_t off, size_t count)
 775 {
 776         struct i2c_client       *client;
 777         struct ds1307           *ds1307;
 778         int                     result;
 779
 780         client = kobj_to_i2c_client(kobj);
 781         ds1307 = i2c_get_clientdata(client);
 782
 783         result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
 784                                                                 count, buf);
 785         if (result < 0)
 786                 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
 787         return result;
 788 }
 789
 790 static ssize_t
 791 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
 792                 struct bin_attribute *attr,
 793                 char *buf, loff_t off, size_t count)
 794 {
 795         struct i2c_client       *client;
 796         struct ds1307           *ds1307;
 797         int                     result;
 798
 799         client = kobj_to_i2c_client(kobj);
 800         ds1307 = i2c_get_clientdata(client);
 801
 802         result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
 803                                                                 count, buf);
 804         if (result < 0) {
 805                 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
 806                 return result;
 807         }
 808         return count;
 809 }
 810
 811
 812 /*----------------------------------------------------------------------*/
 813
 814 static u8 do_trickle_setup_ds1339(struct i2c_client *client,
 815                                   uint32_t ohms, bool diode)
 816 {
 817         u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
 818                 DS1307_TRICKLE_CHARGER_NO_DIODE;
 819
 820         switch (ohms) {
 821         case 250:
 822                 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
 823                 break;
 824         case 2000:
 825                 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
 826                 break;
 827         case 4000:
 828                 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
 829                 break;
 830         default:
 831                 dev_warn(&client->dev,
 832                          "Unsupported ohm value %u in dt\n", ohms);
 833                 return 0;
 834         }
 835         return setup;
 836 }
 837
 838 static void ds1307_trickle_of_init(struct i2c_client *client,
 839                                    struct chip_desc *chip)
 840 {
 841         uint32_t ohms = 0;
 842         bool diode = true;
 843
 844         if (!chip->do_trickle_setup)
 845                 goto out;
 846         if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms))
 847                 goto out;
 848         if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable"))
 849                 diode = false;
 850         chip->trickle_charger_setup = chip->do_trickle_setup(client,
 851                                                              ohms, diode);
 852 out:
 853         return;
 854 }
 855
 856 /*----------------------------------------------------------------------*/
 857
 858 #ifdef CONFIG_RTC_DRV_DS1307_HWMON
 859
 860 /*
 861  * Temperature sensor support for ds3231 devices.
 862  */
 863
 864 #define DS3231_REG_TEMPERATURE  0x11
 865
 866 /*
 867  * A user-initiated temperature conversion is not started by this function,
 868  * so the temperature is updated once every 64 seconds.
 869  */
 870 static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC)
 871 {
 872         struct ds1307 *ds1307 = dev_get_drvdata(dev);
 873         u8 temp_buf[2];
 874         s16 temp;
 875         int ret;
 876
 877         ret = ds1307->read_block_data(ds1307->client, DS3231_REG_TEMPERATURE,
 878                                         sizeof(temp_buf), temp_buf);
 879         if (ret < 0)
 880                 return ret;
 881         if (ret != sizeof(temp_buf))
 882                 return -EIO;
 883
 884         /*
 885          * Temperature is represented as a 10-bit code with a resolution of
 886          * 0.25 degree celsius and encoded in two's complement format.
 887          */
 888         temp = (temp_buf[0] << 8) | temp_buf[1];
 889         temp >>= 6;
 890         *mC = temp * 250;
 891
 892         return 0;
 893 }
 894
 895 static ssize_t ds3231_hwmon_show_temp(struct device *dev,
 896                                 struct device_attribute *attr, char *buf)
 897 {
 898         int ret;
 899         s32 temp;
 900
 901         ret = ds3231_hwmon_read_temp(dev, &temp);
 902         if (ret)
 903                 return ret;
 904
 905         return sprintf(buf, "%d\n", temp);
 906 }
 907 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp,
 908                         NULL, 0);
 909
 910 static struct attribute *ds3231_hwmon_attrs[] = {
 911         &sensor_dev_attr_temp1_input.dev_attr.attr,
 912         NULL,
 913 };
 914 ATTRIBUTE_GROUPS(ds3231_hwmon);
 915
 916 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 917 {
 918         struct device *dev;
 919
 920         if (ds1307->type != ds_3231)
 921                 return;
 922
 923         dev = devm_hwmon_device_register_with_groups(&ds1307->client->dev,
 924                                                 ds1307->client->name,
 925                                                 ds1307, ds3231_hwmon_groups);
 926         if (IS_ERR(dev)) {
 927                 dev_warn(&ds1307->client->dev,
 928                         "unable to register hwmon device %ld\n", PTR_ERR(dev));
 929         }
 930 }
 931
 932 #else
 933
 934 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 935 {
 936 }
 937
 938 #endif /* CONFIG_RTC_DRV_DS1307_HWMON */
 939
 940 /*----------------------------------------------------------------------*/
 941
 942 /*
 943  * Square-wave output support for DS3231
 944  * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
 945  */
 946 #ifdef CONFIG_COMMON_CLK
 947
 948 enum {
 949         DS3231_CLK_SQW = 0,
 950         DS3231_CLK_32KHZ,
 951 };
 952
 953 #define clk_sqw_to_ds1307(clk)  \
 954         container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])
 955 #define clk_32khz_to_ds1307(clk)        \
 956         container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])
 957
 958 static int ds3231_clk_sqw_rates[] = {
 959         1,
 960         1024,
 961         4096,
 962         8192,
 963 };
 964
 965 static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value)
 966 {
 967         struct i2c_client *client = ds1307->client;
 968         struct mutex *lock = &ds1307->rtc->ops_lock;
 969         int control;
 970         int ret;
 971
 972         mutex_lock(lock);
 973
 974         control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 975         if (control < 0) {
 976                 ret = control;
 977                 goto out;
 978         }
 979
 980         control &= ~mask;
 981         control |= value;
 982
 983         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 984 out:
 985         mutex_unlock(lock);
 986
 987         return ret;
 988 }
 989
 990 static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
 991                                                 unsigned long parent_rate)
 992 {
 993         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
 994         int control;
 995         int rate_sel = 0;
 996
 997         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
 998         if (control < 0)
 999                 return control;
1000         if (control & DS1337_BIT_RS1)
1001                 rate_sel += 1;
1002         if (control & DS1337_BIT_RS2)
1003                 rate_sel += 2;
1004
1005         return ds3231_clk_sqw_rates[rate_sel];
1006 }
1007
1008 static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
1009                                         unsigned long *prate)
1010 {
1011         int i;
1012
1013         for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) {
1014                 if (ds3231_clk_sqw_rates[i] <= rate)
1015                         return ds3231_clk_sqw_rates[i];
1016         }
1017
1018         return 0;
1019 }
1020
1021 static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
1022                                         unsigned long parent_rate)
1023 {
1024         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1025         int control = 0;
1026         int rate_sel;
1027
1028         for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates);
1029                         rate_sel++) {
1030                 if (ds3231_clk_sqw_rates[rate_sel] == rate)
1031                         break;
1032         }
1033
1034         if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates))
1035                 return -EINVAL;
1036
1037         if (rate_sel & 1)
1038                 control |= DS1337_BIT_RS1;
1039         if (rate_sel & 2)
1040                 control |= DS1337_BIT_RS2;
1041
1042         return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2,
1043                                 control);
1044 }
1045
1046 static int ds3231_clk_sqw_prepare(struct clk_hw *hw)
1047 {
1048         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1049
1050         return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0);
1051 }
1052
1053 static void ds3231_clk_sqw_unprepare(struct clk_hw *hw)
1054 {
1055         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1056
1057         ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN);
1058 }
1059
1060 static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw)
1061 {
1062         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1063         int control;
1064
1065         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1066         if (control < 0)
1067                 return control;
1068
1069         return !(control & DS1337_BIT_INTCN);
1070 }
1071
1072 static const struct clk_ops ds3231_clk_sqw_ops = {
1073         .prepare = ds3231_clk_sqw_prepare,
1074         .unprepare = ds3231_clk_sqw_unprepare,
1075         .is_prepared = ds3231_clk_sqw_is_prepared,
1076         .recalc_rate = ds3231_clk_sqw_recalc_rate,
1077         .round_rate = ds3231_clk_sqw_round_rate,
1078         .set_rate = ds3231_clk_sqw_set_rate,
1079 };
1080
1081 static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
1082                                                 unsigned long parent_rate)
1083 {
1084         return 32768;
1085 }
1086
1087 static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable)
1088 {
1089         struct i2c_client *client = ds1307->client;
1090         struct mutex *lock = &ds1307->rtc->ops_lock;
1091         int status;
1092         int ret;
1093
1094         mutex_lock(lock);
1095
1096         status = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
1097         if (status < 0) {
1098                 ret = status;
1099                 goto out;
1100         }
1101
1102         if (enable)
1103                 status |= DS3231_BIT_EN32KHZ;
1104         else
1105                 status &= ~DS3231_BIT_EN32KHZ;
1106
1107         ret = i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, status);
1108 out:
1109         mutex_unlock(lock);
1110
1111         return ret;
1112 }
1113
1114 static int ds3231_clk_32khz_prepare(struct clk_hw *hw)
1115 {
1116         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1117
1118         return ds3231_clk_32khz_control(ds1307, true);
1119 }
1120
1121 static void ds3231_clk_32khz_unprepare(struct clk_hw *hw)
1122 {
1123         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1124
1125         ds3231_clk_32khz_control(ds1307, false);
1126 }
1127
1128 static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw)
1129 {
1130         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1131         int status;
1132
1133         status = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_STATUS);
1134         if (status < 0)
1135                 return status;
1136
1137         return !!(status & DS3231_BIT_EN32KHZ);
1138 }
1139
1140 static const struct clk_ops ds3231_clk_32khz_ops = {
1141         .prepare = ds3231_clk_32khz_prepare,
1142         .unprepare = ds3231_clk_32khz_unprepare,
1143         .is_prepared = ds3231_clk_32khz_is_prepared,
1144         .recalc_rate = ds3231_clk_32khz_recalc_rate,
1145 };
1146
1147 static struct clk_init_data ds3231_clks_init[] = {
1148         [DS3231_CLK_SQW] = {
1149                 .name = "ds3231_clk_sqw",
1150                 .ops = &ds3231_clk_sqw_ops,
1151         },
1152         [DS3231_CLK_32KHZ] = {
1153                 .name = "ds3231_clk_32khz",
1154                 .ops = &ds3231_clk_32khz_ops,
1155         },
1156 };
1157
1158 static int ds3231_clks_register(struct ds1307 *ds1307)
1159 {
1160         struct i2c_client *client = ds1307->client;
1161         struct device_node *node = client->dev.of_node;
1162         struct clk_onecell_data *onecell;
1163         int i;
1164
1165         onecell = devm_kzalloc(&client->dev, sizeof(*onecell), GFP_KERNEL);
1166         if (!onecell)
1167                 return -ENOMEM;
1168
1169         onecell->clk_num = ARRAY_SIZE(ds3231_clks_init);
1170         onecell->clks = devm_kcalloc(&client->dev, onecell->clk_num,
1171                                         sizeof(onecell->clks[0]), GFP_KERNEL);
1172         if (!onecell->clks)
1173                 return -ENOMEM;
1174
1175         for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) {
1176                 struct clk_init_data init = ds3231_clks_init[i];
1177
1178                 /*
1179                  * Interrupt signal due to alarm conditions and square-wave
1180                  * output share same pin, so don't initialize both.
1181                  */
1182                 if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags))
1183                         continue;
1184
1185                 /* optional override of the clockname */
1186                 of_property_read_string_index(node, "clock-output-names", i,
1187                                                 &init.name);
1188                 ds1307->clks[i].init = &init;
1189
1190                 onecell->clks[i] = devm_clk_register(&client->dev,
1191                                                         &ds1307->clks[i]);
1192                 if (IS_ERR(onecell->clks[i]))
1193                         return PTR_ERR(onecell->clks[i]);
1194         }
1195
1196         if (!node)
1197                 return 0;
1198
1199         of_clk_add_provider(node, of_clk_src_onecell_get, onecell);
1200
1201         return 0;
1202 }
1203
1204 static void ds1307_clks_register(struct ds1307 *ds1307)
1205 {
1206         int ret;
1207
1208         if (ds1307->type != ds_3231)
1209                 return;
1210
1211         ret = ds3231_clks_register(ds1307);
1212         if (ret) {
1213                 dev_warn(&ds1307->client->dev,
1214                         "unable to register clock device %d\n", ret);
1215         }
1216 }
1217
1218 #else
1219
1220 static void ds1307_clks_register(struct ds1307 *ds1307)
1221 {
1222 }
1223
1224 #endif /* CONFIG_COMMON_CLK */
1225
1226 static int ds1307_probe(struct i2c_client *client,
1227                         const struct i2c_device_id *id)
1228 {
1229         struct ds1307           *ds1307;
1230         int                     err = -ENODEV;
1231         int                     tmp, wday;
1232         struct chip_desc        *chip = &chips[id->driver_data];
1233         struct i2c_adapter      *adapter = to_i2c_adapter(client->dev.parent);
1234         bool                    want_irq = false;
1235         bool                    ds1307_can_wakeup_device = false;
1236         unsigned char           *buf;
1237         struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
1238         struct rtc_time         tm;
1239         unsigned long           timestamp;
1240
1241         irq_handler_t   irq_handler = ds1307_irq;
1242
1243         static const int        bbsqi_bitpos[] = {
1244                 [ds_1337] = 0,
1245                 [ds_1339] = DS1339_BIT_BBSQI,
1246                 [ds_3231] = DS3231_BIT_BBSQW,
1247         };
1248         const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
1249
1250         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
1251             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
1252                 return -EIO;
1253
1254         ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
1255         if (!ds1307)
1256                 return -ENOMEM;
1257
1258         i2c_set_clientdata(client, ds1307);
1259
1260         ds1307->client  = client;
1261         ds1307->type    = id->driver_data;
1262
1263         if (!pdata && client->dev.of_node)
1264                 ds1307_trickle_of_init(client, chip);
1265         else if (pdata && pdata->trickle_charger_setup)
1266                 chip->trickle_charger_setup = pdata->trickle_charger_setup;
1267
1268         if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
1269                 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
1270                     DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
1271                     chip->trickle_charger_reg);
1272                 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
1273                     DS13XX_TRICKLE_CHARGER_MAGIC |
1274                     chip->trickle_charger_setup);
1275         }
1276
1277         buf = ds1307->regs;
1278         if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1279                 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
1280                 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
1281         } else {
1282                 ds1307->read_block_data = ds1307_read_block_data;
1283                 ds1307->write_block_data = ds1307_write_block_data;
1284         }
1285
1286 #ifdef CONFIG_OF
1287 /*
1288  * For devices with no IRQ directly connected to the SoC, the RTC chip
1289  * can be forced as a wakeup source by stating that explicitly in
1290  * the device's .dts file using the "wakeup-source" boolean property.
1291  * If the "wakeup-source" property is set, don't request an IRQ.
1292  * This will guarantee the 'wakealarm' sysfs entry is available on the device,
1293  * if supported by the RTC.
1294  */
1295         if (of_property_read_bool(client->dev.of_node, "wakeup-source")) {
1296                 ds1307_can_wakeup_device = true;
1297         }
1298 #endif
1299
1300         switch (ds1307->type) {
1301         case ds_1337:
1302         case ds_1339:
1303         case ds_3231:
1304                 /* get registers that the "rtc" read below won't read... */
1305                 tmp = ds1307->read_block_data(ds1307->client,
1306                                 DS1337_REG_CONTROL, 2, buf);
1307                 if (tmp != 2) {
1308                         dev_dbg(&client->dev, "read error %d\n", tmp);
1309                         err = -EIO;
1310                         goto exit;
1311                 }
1312
1313                 /* oscillator off?  turn it on, so clock can tick. */
1314                 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
1315                         ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
1316
1317                 /*
1318                  * Using IRQ or defined as wakeup-source?
1319                  * Disable the square wave and both alarms.
1320                  * For some variants, be sure alarms can trigger when we're
1321                  * running on Vbackup (BBSQI/BBSQW)
1322                  */
1323                 if (chip->alarm && (ds1307->client->irq > 0 ||
1324                                                 ds1307_can_wakeup_device)) {
1325                         ds1307->regs[0] |= DS1337_BIT_INTCN
1326                                         | bbsqi_bitpos[ds1307->type];
1327                         ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
1328
1329                         want_irq = true;
1330                 }
1331
1332                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
1333                                                         ds1307->regs[0]);
1334
1335                 /* oscillator fault?  clear flag, and warn */
1336                 if (ds1307->regs[1] & DS1337_BIT_OSF) {
1337                         i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
1338                                 ds1307->regs[1] & ~DS1337_BIT_OSF);
1339                         dev_warn(&client->dev, "SET TIME!\n");
1340                 }
1341                 break;
1342
1343         case rx_8025:
1344                 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1345                                 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1346                 if (tmp != 2) {
1347                         dev_dbg(&client->dev, "read error %d\n", tmp);
1348                         err = -EIO;
1349                         goto exit;
1350                 }
1351
1352                 /* oscillator off?  turn it on, so clock can tick. */
1353                 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
1354                         ds1307->regs[1] |= RX8025_BIT_XST;
1355                         i2c_smbus_write_byte_data(client,
1356                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1357                                                   ds1307->regs[1]);
1358                         dev_warn(&client->dev,
1359                                  "oscillator stop detected - SET TIME!\n");
1360                 }
1361
1362                 if (ds1307->regs[1] & RX8025_BIT_PON) {
1363                         ds1307->regs[1] &= ~RX8025_BIT_PON;
1364                         i2c_smbus_write_byte_data(client,
1365                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1366                                                   ds1307->regs[1]);
1367                         dev_warn(&client->dev, "power-on detected\n");
1368                 }
1369
1370                 if (ds1307->regs[1] & RX8025_BIT_VDET) {
1371                         ds1307->regs[1] &= ~RX8025_BIT_VDET;
1372                         i2c_smbus_write_byte_data(client,
1373                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1374                                                   ds1307->regs[1]);
1375                         dev_warn(&client->dev, "voltage drop detected\n");
1376                 }
1377
1378                 /* make sure we are running in 24hour mode */
1379                 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
1380                         u8 hour;
1381
1382                         /* switch to 24 hour mode */
1383                         i2c_smbus_write_byte_data(client,
1384                                                   RX8025_REG_CTRL1 << 4 | 0x08,
1385                                                   ds1307->regs[0] |
1386                                                   RX8025_BIT_2412);
1387
1388                         tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1389                                         RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1390                         if (tmp != 2) {
1391                                 dev_dbg(&client->dev, "read error %d\n", tmp);
1392                                 err = -EIO;
1393                                 goto exit;
1394                         }
1395
1396                         /* correct hour */
1397                         hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
1398                         if (hour == 12)
1399                                 hour = 0;
1400                         if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1401                                 hour += 12;
1402
1403                         i2c_smbus_write_byte_data(client,
1404                                                   DS1307_REG_HOUR << 4 | 0x08,
1405                                                   hour);
1406                 }
1407                 break;
1408         case ds_1388:
1409                 ds1307->offset = 1; /* Seconds starts at 1 */
1410                 break;
1411         case mcp794xx:
1412                 rtc_ops = &mcp794xx_rtc_ops;
1413                 if (ds1307->client->irq > 0 && chip->alarm) {
1414                         irq_handler = mcp794xx_irq;
1415                         want_irq = true;
1416                 }
1417                 break;
1418         default:
1419                 break;
1420         }
1421
1422 read_rtc:
1423         /* read RTC registers */
1424         tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
1425         if (tmp != 8) {
1426                 dev_dbg(&client->dev, "read error %d\n", tmp);
1427                 err = -EIO;
1428                 goto exit;
1429         }
1430
1431         /*
1432          * minimal sanity checking; some chips (like DS1340) don't
1433          * specify the extra bits as must-be-zero, but there are
1434          * still a few values that are clearly out-of-range.
1435          */
1436         tmp = ds1307->regs[DS1307_REG_SECS];
1437         switch (ds1307->type) {
1438         case ds_1307:
1439         case m41t00:
1440                 /* clock halted?  turn it on, so clock can tick. */
1441                 if (tmp & DS1307_BIT_CH) {
1442                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1443                         dev_warn(&client->dev, "SET TIME!\n");
1444                         goto read_rtc;
1445                 }
1446                 break;
1447         case ds_1338:
1448                 /* clock halted?  turn it on, so clock can tick. */
1449                 if (tmp & DS1307_BIT_CH)
1450                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1451
1452                 /* oscillator fault?  clear flag, and warn */
1453                 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
1454                         i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
1455                                         ds1307->regs[DS1307_REG_CONTROL]
1456                                         & ~DS1338_BIT_OSF);
1457                         dev_warn(&client->dev, "SET TIME!\n");
1458                         goto read_rtc;
1459                 }
1460                 break;
1461         case ds_1340:
1462                 /* clock halted?  turn it on, so clock can tick. */
1463                 if (tmp & DS1340_BIT_nEOSC)
1464                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1465
1466                 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
1467                 if (tmp < 0) {
1468                         dev_dbg(&client->dev, "read error %d\n", tmp);
1469                         err = -EIO;
1470                         goto exit;
1471                 }
1472
1473                 /* oscillator fault?  clear flag, and warn */
1474                 if (tmp & DS1340_BIT_OSF) {
1475                         i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
1476                         dev_warn(&client->dev, "SET TIME!\n");
1477                 }
1478                 break;
1479         case mcp794xx:
1480                 /* make sure that the backup battery is enabled */
1481                 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
1482                         i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
1483                                         ds1307->regs[DS1307_REG_WDAY]
1484                                         | MCP794XX_BIT_VBATEN);
1485                 }
1486
1487                 /* clock halted?  turn it on, so clock can tick. */
1488                 if (!(tmp & MCP794XX_BIT_ST)) {
1489                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
1490                                         MCP794XX_BIT_ST);
1491                         dev_warn(&client->dev, "SET TIME!\n");
1492                         goto read_rtc;
1493                 }
1494
1495                 break;
1496         default:
1497                 break;
1498         }
1499
1500         tmp = ds1307->regs[DS1307_REG_HOUR];
1501         switch (ds1307->type) {
1502         case ds_1340:
1503         case m41t00:
1504                 /*
1505                  * NOTE: ignores century bits; fix before deploying
1506                  * systems that will run through year 2100.
1507                  */
1508                 break;
1509         case rx_8025:
1510                 break;
1511         default:
1512                 if (!(tmp & DS1307_BIT_12HR))
1513                         break;
1514
1515                 /*
1516                  * Be sure we're in 24 hour mode.  Multi-master systems
1517                  * take note...
1518                  */
1519                 tmp = bcd2bin(tmp & 0x1f);
1520                 if (tmp == 12)
1521                         tmp = 0;
1522                 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1523                         tmp += 12;
1524                 i2c_smbus_write_byte_data(client,
1525                                 ds1307->offset + DS1307_REG_HOUR,
1526                                 bin2bcd(tmp));
1527         }
1528
1529         /*
1530          * Some IPs have weekday reset value = 0x1 which might not correct
1531          * hence compute the wday using the current date/month/year values
1532          */
1533         ds1307_get_time(&client->dev, &tm);
1534         wday = tm.tm_wday;
1535         timestamp = rtc_tm_to_time64(&tm);
1536         rtc_time64_to_tm(timestamp, &tm);
1537
1538         /*
1539          * Check if reset wday is different from the computed wday
1540          * If different then set the wday which we computed using
1541          * timestamp
1542          */
1543         if (wday != tm.tm_wday) {
1544                 wday = i2c_smbus_read_byte_data(client, MCP794XX_REG_WEEKDAY);
1545                 wday = wday & ~MCP794XX_REG_WEEKDAY_WDAY_MASK;
1546                 wday = wday | (tm.tm_wday + 1);
1547                 i2c_smbus_write_byte_data(client, MCP794XX_REG_WEEKDAY, wday);
1548         }
1549
1550         if (want_irq) {
1551                 device_set_wakeup_capable(&client->dev, true);
1552                 set_bit(HAS_ALARM, &ds1307->flags);
1553         }
1554         ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
1555                                 rtc_ops, THIS_MODULE);
1556         if (IS_ERR(ds1307->rtc)) {
1557                 return PTR_ERR(ds1307->rtc);
1558         }
1559
1560         if (ds1307_can_wakeup_device && ds1307->client->irq <= 0) {
1561                 /* Disable request for an IRQ */
1562                 want_irq = false;
1563                 dev_info(&client->dev, "'wakeup-source' is set, request for an IRQ is disabled!\n");
1564                 /* We cannot support UIE mode if we do not have an IRQ line */
1565                 ds1307->rtc->uie_unsupported = 1;
1566         }
1567
1568         if (want_irq) {
1569                 err = devm_request_threaded_irq(&client->dev,
1570                                                 client->irq, NULL, irq_handler,
1571                                                 IRQF_SHARED | IRQF_ONESHOT,
1572                                                 ds1307->rtc->name, client);
1573                 if (err) {
1574                         client->irq = 0;
1575                         device_set_wakeup_capable(&client->dev, false);
1576                         clear_bit(HAS_ALARM, &ds1307->flags);
1577                         dev_err(&client->dev, "unable to request IRQ!\n");
1578                 } else
1579                         dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
1580         }
1581
1582         if (chip->nvram_size) {
1583
1584                 ds1307->nvram = devm_kzalloc(&client->dev,
1585                                         sizeof(struct bin_attribute),
1586                                         GFP_KERNEL);
1587                 if (!ds1307->nvram) {
1588                         dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
1589                 } else {
1590
1591                         ds1307->nvram->attr.name = "nvram";
1592                         ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
1593
1594                         sysfs_bin_attr_init(ds1307->nvram);
1595
1596                         ds1307->nvram->read = ds1307_nvram_read;
1597                         ds1307->nvram->write = ds1307_nvram_write;
1598                         ds1307->nvram->size = chip->nvram_size;
1599                         ds1307->nvram_offset = chip->nvram_offset;
1600
1601                         err = sysfs_create_bin_file(&client->dev.kobj,
1602                                                     ds1307->nvram);
1603                         if (err) {
1604                                 dev_err(&client->dev,
1605                                         "unable to create sysfs file: %s\n",
1606                                         ds1307->nvram->attr.name);
1607                         } else {
1608                                 set_bit(HAS_NVRAM, &ds1307->flags);
1609                                 dev_info(&client->dev, "%zu bytes nvram\n",
1610                                          ds1307->nvram->size);
1611                         }
1612                 }
1613         }
1614
1615         ds1307_hwmon_register(ds1307);
1616         ds1307_clks_register(ds1307);
1617
1618         return 0;
1619
1620 exit:
1621         return err;
1622 }
1623
1624 static int ds1307_remove(struct i2c_client *client)
1625 {
1626         struct ds1307 *ds1307 = i2c_get_clientdata(client);
1627
1628         if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1629                 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
1630
1631         return 0;
1632 }
1633
1634 static struct i2c_driver ds1307_driver = {
1635         .driver = {
1636                 .name   = "rtc-ds1307",
1637         },
1638         .probe          = ds1307_probe,
1639         .remove         = ds1307_remove,
1640         .id_table       = ds1307_id,
1641 };
1642
1643 module_i2c_driver(ds1307_driver);
1644
1645 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1646 MODULE_LICENSE("GPL");