drivers/tty/serial/8250/8250_ingenic.c

   1 /*
   2  * Copyright (C) 2010 Lars-Peter Clausen <lars@metafoo.de>
   3  * Copyright (C) 2015 Imagination Technologies
   4  *
   5  * Ingenic SoC UART support
   6  *
   7  * This program is free software; you can redistribute   it and/or modify it
   8  * under  the terms of   the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the   License, or (at your
  10  * option) any later version.
  11  *
  12  * You should have received a copy of the  GNU General Public License along
  13  * with this program; if not, write  to the Free Software Foundation, Inc.,
  14  * 675 Mass Ave, Cambridge, MA 02139, USA.
  15  */
  16
  17 #include <linux/clk.h>
  18 #include <linux/console.h>
  19 #include <linux/io.h>
  20 #include <linux/libfdt.h>
  21 #include <linux/module.h>
  22 #include <linux/of.h>
  23 #include <linux/of_fdt.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/serial_8250.h>
  26 #include <linux/serial_core.h>
  27 #include <linux/serial_reg.h>
  28
  29 struct ingenic_uart_data {
  30         struct clk      *clk_module;
  31         struct clk      *clk_baud;
  32         int             line;
  33 };
  34
  35 #define UART_FCR_UME    BIT(4)
  36
  37 #define UART_MCR_MDCE   BIT(7)
  38 #define UART_MCR_FCM    BIT(6)
  39
  40 static struct earlycon_device *early_device;
  41
  42 static uint8_t __init early_in(struct uart_port *port, int offset)
  43 {
  44         return readl(port->membase + (offset << 2));
  45 }
  46
  47 static void __init early_out(struct uart_port *port, int offset, uint8_t value)
  48 {
  49         writel(value, port->membase + (offset << 2));
  50 }
  51
  52 static void __init ingenic_early_console_putc(struct uart_port *port, int c)
  53 {
  54         uint8_t lsr;
  55
  56         do {
  57                 lsr = early_in(port, UART_LSR);
  58         } while ((lsr & UART_LSR_TEMT) == 0);
  59
  60         early_out(port, UART_TX, c);
  61 }
  62
  63 static void __init ingenic_early_console_write(struct console *console,
  64                                               const char *s, unsigned int count)
  65 {
  66         uart_console_write(&early_device->port, s, count,
  67                            ingenic_early_console_putc);
  68 }
  69
  70 static void __init ingenic_early_console_setup_clock(struct earlycon_device *dev)
  71 {
  72         void *fdt = initial_boot_params;
  73         const __be32 *prop;
  74         int offset;
  75
  76         offset = fdt_path_offset(fdt, "/ext");
  77         if (offset < 0)
  78                 return;
  79
  80         prop = fdt_getprop(fdt, offset, "clock-frequency", NULL);
  81         if (!prop)
  82                 return;
  83
  84         dev->port.uartclk = be32_to_cpup(prop);
  85 }
  86
  87 static int __init ingenic_early_console_setup(struct earlycon_device *dev,
  88                                               const char *opt)
  89 {
  90         struct uart_port *port = &dev->port;
  91         unsigned int baud, divisor;
  92
  93         if (!dev->port.membase)
  94                 return -ENODEV;
  95
  96         ingenic_early_console_setup_clock(dev);
  97
  98         baud = dev->baud ?: 115200;
  99         divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * baud);
 100
 101         early_out(port, UART_IER, 0);
 102         early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
 103         early_out(port, UART_DLL, 0);
 104         early_out(port, UART_DLM, 0);
 105         early_out(port, UART_LCR, UART_LCR_WLEN8);
 106         early_out(port, UART_FCR, UART_FCR_UME | UART_FCR_CLEAR_XMIT |
 107                         UART_FCR_CLEAR_RCVR | UART_FCR_ENABLE_FIFO);
 108         early_out(port, UART_MCR, UART_MCR_RTS | UART_MCR_DTR);
 109
 110         early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
 111         early_out(port, UART_DLL, divisor & 0xff);
 112         early_out(port, UART_DLM, (divisor >> 8) & 0xff);
 113         early_out(port, UART_LCR, UART_LCR_WLEN8);
 114
 115         early_device = dev;
 116         dev->con->write = ingenic_early_console_write;
 117
 118         return 0;
 119 }
 120
 121 EARLYCON_DECLARE(jz4740_uart, ingenic_early_console_setup);
 122 OF_EARLYCON_DECLARE(jz4740_uart, "ingenic,jz4740-uart",
 123                     ingenic_early_console_setup);
 124
 125 EARLYCON_DECLARE(jz4775_uart, ingenic_early_console_setup);
 126 OF_EARLYCON_DECLARE(jz4775_uart, "ingenic,jz4775-uart",
 127                     ingenic_early_console_setup);
 128
 129 EARLYCON_DECLARE(jz4780_uart, ingenic_early_console_setup);
 130 OF_EARLYCON_DECLARE(jz4780_uart, "ingenic,jz4780-uart",
 131                     ingenic_early_console_setup);
 132
 133 static void ingenic_uart_serial_out(struct uart_port *p, int offset, int value)
 134 {
 135         int ier;
 136
 137         switch (offset) {
 138         case UART_FCR:
 139                 /* UART module enable */
 140                 value |= UART_FCR_UME;
 141                 break;
 142
 143         case UART_IER:
 144                 /* Enable receive timeout interrupt with the
 145                  * receive line status interrupt */
 146                 value |= (value & 0x4) << 2;
 147                 break;
 148
 149         case UART_MCR:
 150                 /* If we have enabled modem status IRQs we should enable modem
 151                  * mode. */
 152                 ier = p->serial_in(p, UART_IER);
 153
 154                 if (ier & UART_IER_MSI)
 155                         value |= UART_MCR_MDCE | UART_MCR_FCM;
 156                 else
 157                         value &= ~(UART_MCR_MDCE | UART_MCR_FCM);
 158                 break;
 159
 160         default:
 161                 break;
 162         }
 163
 164         writeb(value, p->membase + (offset << p->regshift));
 165 }
 166
 167 static unsigned int ingenic_uart_serial_in(struct uart_port *p, int offset)
 168 {
 169         unsigned int value;
 170
 171         value = readb(p->membase + (offset << p->regshift));
 172
 173         /* Hide non-16550 compliant bits from higher levels */
 174         switch (offset) {
 175         case UART_FCR:
 176                 value &= ~UART_FCR_UME;
 177                 break;
 178
 179         case UART_MCR:
 180                 value &= ~(UART_MCR_MDCE | UART_MCR_FCM);
 181                 break;
 182
 183         default:
 184                 break;
 185         }
 186         return value;
 187 }
 188
 189 static int ingenic_uart_probe(struct platform_device *pdev)
 190 {
 191         struct uart_8250_port uart = {};
 192         struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 193         struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 194         struct ingenic_uart_data *data;
 195         int err, line;
 196
 197         if (!regs || !irq) {
 198                 dev_err(&pdev->dev, "no registers/irq defined\n");
 199                 return -EINVAL;
 200         }
 201
 202         data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 203         if (!data)
 204                 return -ENOMEM;
 205
 206         spin_lock_init(&uart.port.lock);
 207         uart.port.type = PORT_16550;
 208         uart.port.flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE;
 209         uart.port.iotype = UPIO_MEM;
 210         uart.port.mapbase = regs->start;
 211         uart.port.regshift = 2;
 212         uart.port.serial_out = ingenic_uart_serial_out;
 213         uart.port.serial_in = ingenic_uart_serial_in;
 214         uart.port.irq = irq->start;
 215         uart.port.dev = &pdev->dev;
 216
 217         /* Check for a fixed line number */
 218         line = of_alias_get_id(pdev->dev.of_node, "serial");
 219         if (line >= 0)
 220                 uart.port.line = line;
 221
 222         uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
 223                                          resource_size(regs));
 224         if (!uart.port.membase)
 225                 return -ENOMEM;
 226
 227         data->clk_module = devm_clk_get(&pdev->dev, "module");
 228         if (IS_ERR(data->clk_module)) {
 229                 err = PTR_ERR(data->clk_module);
 230                 if (err != -EPROBE_DEFER)
 231                         dev_err(&pdev->dev,
 232                                 "unable to get module clock: %d\n", err);
 233                 return err;
 234         }
 235
 236         data->clk_baud = devm_clk_get(&pdev->dev, "baud");
 237         if (IS_ERR(data->clk_baud)) {
 238                 err = PTR_ERR(data->clk_baud);
 239                 if (err != -EPROBE_DEFER)
 240                         dev_err(&pdev->dev,
 241                                 "unable to get baud clock: %d\n", err);
 242                 return err;
 243         }
 244
 245         err = clk_prepare_enable(data->clk_module);
 246         if (err) {
 247                 dev_err(&pdev->dev, "could not enable module clock: %d\n", err);
 248                 goto out;
 249         }
 250
 251         err = clk_prepare_enable(data->clk_baud);
 252         if (err) {
 253                 dev_err(&pdev->dev, "could not enable baud clock: %d\n", err);
 254                 goto out_disable_moduleclk;
 255         }
 256         uart.port.uartclk = clk_get_rate(data->clk_baud);
 257
 258         data->line = serial8250_register_8250_port(&uart);
 259         if (data->line < 0) {
 260                 err = data->line;
 261                 goto out_disable_baudclk;
 262         }
 263
 264         platform_set_drvdata(pdev, data);
 265         return 0;
 266
 267 out_disable_baudclk:
 268         clk_disable_unprepare(data->clk_baud);
 269 out_disable_moduleclk:
 270         clk_disable_unprepare(data->clk_module);
 271 out:
 272         return err;
 273 }
 274
 275 static int ingenic_uart_remove(struct platform_device *pdev)
 276 {
 277         struct ingenic_uart_data *data = platform_get_drvdata(pdev);
 278
 279         serial8250_unregister_port(data->line);
 280         clk_disable_unprepare(data->clk_module);
 281         clk_disable_unprepare(data->clk_baud);
 282         return 0;
 283 }
 284
 285 static const struct of_device_id of_match[] = {
 286         { .compatible = "ingenic,jz4740-uart" },
 287         { .compatible = "ingenic,jz4775-uart" },
 288         { .compatible = "ingenic,jz4780-uart" },
 289         { /* sentinel */ }
 290 };
 291 MODULE_DEVICE_TABLE(of, of_match);
 292
 293 static struct platform_driver ingenic_uart_platform_driver = {
 294         .driver = {
 295                 .name           = "ingenic-uart",
 296                 .of_match_table = of_match,
 297         },
 298         .probe                  = ingenic_uart_probe,
 299         .remove                 = ingenic_uart_remove,
 300 };
 301
 302 module_platform_driver(ingenic_uart_platform_driver);
 303
 304 MODULE_AUTHOR("Paul Burton");
 305 MODULE_LICENSE("GPL");
 306 MODULE_DESCRIPTION("Ingenic SoC UART driver");