2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
40 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
41 static int link_quirk;
42 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
43 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
45 static unsigned int quirks;
46 module_param(quirks, uint, S_IRUGO);
47 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
49 /* TODO: copied from ehci-hcd.c - can this be refactored? */
51 * xhci_handshake - spin reading hc until handshake completes or fails
52 * @ptr: address of hc register to be read
53 * @mask: bits to look at in result of read
54 * @done: value of those bits when handshake succeeds
55 * @usec: timeout in microseconds
57 * Returns negative errno, or zero on success
59 * Success happens when the "mask" bits have the specified value (hardware
60 * handshake done). There are two failure modes: "usec" have passed (major
61 * hardware flakeout), or the register reads as all-ones (hardware removed).
63 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
69 if (result == ~(u32)0) /* card removed */
81 * Disable interrupts and begin the xHCI halting process.
83 void xhci_quiesce(struct xhci_hcd *xhci)
90 halted = readl(&xhci->op_regs->status) & STS_HALT;
94 cmd = readl(&xhci->op_regs->command);
96 writel(cmd, &xhci->op_regs->command);
100 * Force HC into halt state.
102 * Disable any IRQs and clear the run/stop bit.
103 * HC will complete any current and actively pipelined transactions, and
104 * should halt within 16 ms of the run/stop bit being cleared.
105 * Read HC Halted bit in the status register to see when the HC is finished.
107 int xhci_halt(struct xhci_hcd *xhci)
110 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
113 ret = xhci_handshake(&xhci->op_regs->status,
114 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
116 xhci->xhc_state |= XHCI_STATE_HALTED;
117 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
119 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
125 * Set the run bit and wait for the host to be running.
127 static int xhci_start(struct xhci_hcd *xhci)
132 temp = readl(&xhci->op_regs->command);
134 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
136 writel(temp, &xhci->op_regs->command);
139 * Wait for the HCHalted Status bit to be 0 to indicate the host is
142 ret = xhci_handshake(&xhci->op_regs->status,
143 STS_HALT, 0, XHCI_MAX_HALT_USEC);
144 if (ret == -ETIMEDOUT)
145 xhci_err(xhci, "Host took too long to start, "
146 "waited %u microseconds.\n",
149 xhci->xhc_state &= ~XHCI_STATE_HALTED;
156 * This resets pipelines, timers, counters, state machines, etc.
157 * Transactions will be terminated immediately, and operational registers
158 * will be set to their defaults.
160 int xhci_reset(struct xhci_hcd *xhci)
166 state = readl(&xhci->op_regs->status);
167 if ((state & STS_HALT) == 0) {
168 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
172 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
173 command = readl(&xhci->op_regs->command);
174 command |= CMD_RESET;
175 writel(command, &xhci->op_regs->command);
177 ret = xhci_handshake(&xhci->op_regs->command,
178 CMD_RESET, 0, 10 * 1000 * 1000);
182 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
183 "Wait for controller to be ready for doorbell rings");
185 * xHCI cannot write to any doorbells or operational registers other
186 * than status until the "Controller Not Ready" flag is cleared.
188 ret = xhci_handshake(&xhci->op_regs->status,
189 STS_CNR, 0, 10 * 1000 * 1000);
191 for (i = 0; i < 2; ++i) {
192 xhci->bus_state[i].port_c_suspend = 0;
193 xhci->bus_state[i].suspended_ports = 0;
194 xhci->bus_state[i].resuming_ports = 0;
201 static int xhci_free_msi(struct xhci_hcd *xhci)
205 if (!xhci->msix_entries)
208 for (i = 0; i < xhci->msix_count; i++)
209 if (xhci->msix_entries[i].vector)
210 free_irq(xhci->msix_entries[i].vector,
218 static int xhci_setup_msi(struct xhci_hcd *xhci)
221 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
223 ret = pci_enable_msi(pdev);
225 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
226 "failed to allocate MSI entry");
230 ret = request_irq(pdev->irq, xhci_msi_irq,
231 0, "xhci_hcd", xhci_to_hcd(xhci));
233 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
234 "disable MSI interrupt");
235 pci_disable_msi(pdev);
243 * free all IRQs request
245 static void xhci_free_irq(struct xhci_hcd *xhci)
247 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
250 /* return if using legacy interrupt */
251 if (xhci_to_hcd(xhci)->irq > 0)
254 ret = xhci_free_msi(xhci);
258 free_irq(pdev->irq, xhci_to_hcd(xhci));
266 static int xhci_setup_msix(struct xhci_hcd *xhci)
269 struct usb_hcd *hcd = xhci_to_hcd(xhci);
270 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
273 * calculate number of msi-x vectors supported.
274 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
275 * with max number of interrupters based on the xhci HCSPARAMS1.
276 * - num_online_cpus: maximum msi-x vectors per CPUs core.
277 * Add additional 1 vector to ensure always available interrupt.
279 xhci->msix_count = min(num_online_cpus() + 1,
280 HCS_MAX_INTRS(xhci->hcs_params1));
283 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
285 if (!xhci->msix_entries) {
286 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
290 for (i = 0; i < xhci->msix_count; i++) {
291 xhci->msix_entries[i].entry = i;
292 xhci->msix_entries[i].vector = 0;
295 ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
297 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
298 "Failed to enable MSI-X");
302 for (i = 0; i < xhci->msix_count; i++) {
303 ret = request_irq(xhci->msix_entries[i].vector,
305 0, "xhci_hcd", xhci_to_hcd(xhci));
310 hcd->msix_enabled = 1;
314 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
316 pci_disable_msix(pdev);
318 kfree(xhci->msix_entries);
319 xhci->msix_entries = NULL;
323 /* Free any IRQs and disable MSI-X */
324 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
326 struct usb_hcd *hcd = xhci_to_hcd(xhci);
327 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
329 if (xhci->quirks & XHCI_PLAT)
334 if (xhci->msix_entries) {
335 pci_disable_msix(pdev);
336 kfree(xhci->msix_entries);
337 xhci->msix_entries = NULL;
339 pci_disable_msi(pdev);
342 hcd->msix_enabled = 0;
346 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
350 if (xhci->msix_entries) {
351 for (i = 0; i < xhci->msix_count; i++)
352 synchronize_irq(xhci->msix_entries[i].vector);
356 static int xhci_try_enable_msi(struct usb_hcd *hcd)
358 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
359 struct pci_dev *pdev;
362 /* The xhci platform device has set up IRQs through usb_add_hcd. */
363 if (xhci->quirks & XHCI_PLAT)
366 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
368 * Some Fresco Logic host controllers advertise MSI, but fail to
369 * generate interrupts. Don't even try to enable MSI.
371 if (xhci->quirks & XHCI_BROKEN_MSI)
374 /* unregister the legacy interrupt */
376 free_irq(hcd->irq, hcd);
379 ret = xhci_setup_msix(xhci);
381 /* fall back to msi*/
382 ret = xhci_setup_msi(xhci);
385 /* hcd->irq is 0, we have MSI */
389 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
394 if (!strlen(hcd->irq_descr))
395 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
396 hcd->driver->description, hcd->self.busnum);
398 /* fall back to legacy interrupt*/
399 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
400 hcd->irq_descr, hcd);
402 xhci_err(xhci, "request interrupt %d failed\n",
406 hcd->irq = pdev->irq;
412 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
417 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
421 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
427 static void compliance_mode_recovery(unsigned long arg)
429 struct xhci_hcd *xhci;
434 xhci = (struct xhci_hcd *)arg;
436 for (i = 0; i < xhci->num_usb3_ports; i++) {
437 temp = readl(xhci->usb3_ports[i]);
438 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
440 * Compliance Mode Detected. Letting USB Core
441 * handle the Warm Reset
443 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
444 "Compliance mode detected->port %d",
446 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
447 "Attempting compliance mode recovery");
448 hcd = xhci->shared_hcd;
450 if (hcd->state == HC_STATE_SUSPENDED)
451 usb_hcd_resume_root_hub(hcd);
453 usb_hcd_poll_rh_status(hcd);
457 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
458 mod_timer(&xhci->comp_mode_recovery_timer,
459 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
463 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
464 * that causes ports behind that hardware to enter compliance mode sometimes.
465 * The quirk creates a timer that polls every 2 seconds the link state of
466 * each host controller's port and recovers it by issuing a Warm reset
467 * if Compliance mode is detected, otherwise the port will become "dead" (no
468 * device connections or disconnections will be detected anymore). Becasue no
469 * status event is generated when entering compliance mode (per xhci spec),
470 * this quirk is needed on systems that have the failing hardware installed.
472 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
474 xhci->port_status_u0 = 0;
475 setup_timer(&xhci->comp_mode_recovery_timer,
476 compliance_mode_recovery, (unsigned long)xhci);
477 xhci->comp_mode_recovery_timer.expires = jiffies +
478 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
480 set_timer_slack(&xhci->comp_mode_recovery_timer,
481 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
482 add_timer(&xhci->comp_mode_recovery_timer);
483 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
484 "Compliance mode recovery timer initialized");
488 * This function identifies the systems that have installed the SN65LVPE502CP
489 * USB3.0 re-driver and that need the Compliance Mode Quirk.
491 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
493 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
495 const char *dmi_product_name, *dmi_sys_vendor;
497 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
498 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
499 if (!dmi_product_name || !dmi_sys_vendor)
502 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
505 if (strstr(dmi_product_name, "Z420") ||
506 strstr(dmi_product_name, "Z620") ||
507 strstr(dmi_product_name, "Z820") ||
508 strstr(dmi_product_name, "Z1 Workstation"))
514 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
516 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
521 * Initialize memory for HCD and xHC (one-time init).
523 * Program the PAGESIZE register, initialize the device context array, create
524 * device contexts (?), set up a command ring segment (or two?), create event
525 * ring (one for now).
527 int xhci_init(struct usb_hcd *hcd)
529 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
532 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
533 spin_lock_init(&xhci->lock);
534 if (xhci->hci_version == 0x95 && link_quirk) {
535 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
536 "QUIRK: Not clearing Link TRB chain bits.");
537 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
539 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
540 "xHCI doesn't need link TRB QUIRK");
542 retval = xhci_mem_init(xhci, GFP_KERNEL);
543 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
545 /* Initializing Compliance Mode Recovery Data If Needed */
546 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
547 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
548 compliance_mode_recovery_timer_init(xhci);
554 /*-------------------------------------------------------------------------*/
557 static int xhci_run_finished(struct xhci_hcd *xhci)
559 if (xhci_start(xhci)) {
563 xhci->shared_hcd->state = HC_STATE_RUNNING;
564 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
566 if (xhci->quirks & XHCI_NEC_HOST)
567 xhci_ring_cmd_db(xhci);
569 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
570 "Finished xhci_run for USB3 roothub");
575 * Start the HC after it was halted.
577 * This function is called by the USB core when the HC driver is added.
578 * Its opposite is xhci_stop().
580 * xhci_init() must be called once before this function can be called.
581 * Reset the HC, enable device slot contexts, program DCBAAP, and
582 * set command ring pointer and event ring pointer.
584 * Setup MSI-X vectors and enable interrupts.
586 int xhci_run(struct usb_hcd *hcd)
591 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
593 /* Start the xHCI host controller running only after the USB 2.0 roothub
597 hcd->uses_new_polling = 1;
598 if (!usb_hcd_is_primary_hcd(hcd))
599 return xhci_run_finished(xhci);
601 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
603 ret = xhci_try_enable_msi(hcd);
607 xhci_dbg(xhci, "Command ring memory map follows:\n");
608 xhci_debug_ring(xhci, xhci->cmd_ring);
609 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
610 xhci_dbg_cmd_ptrs(xhci);
612 xhci_dbg(xhci, "ERST memory map follows:\n");
613 xhci_dbg_erst(xhci, &xhci->erst);
614 xhci_dbg(xhci, "Event ring:\n");
615 xhci_debug_ring(xhci, xhci->event_ring);
616 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
617 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
618 temp_64 &= ~ERST_PTR_MASK;
619 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
620 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
622 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
623 "// Set the interrupt modulation register");
624 temp = readl(&xhci->ir_set->irq_control);
625 temp &= ~ER_IRQ_INTERVAL_MASK;
627 writel(temp, &xhci->ir_set->irq_control);
629 /* Set the HCD state before we enable the irqs */
630 temp = readl(&xhci->op_regs->command);
632 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
633 "// Enable interrupts, cmd = 0x%x.", temp);
634 writel(temp, &xhci->op_regs->command);
636 temp = readl(&xhci->ir_set->irq_pending);
637 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
638 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
639 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
640 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
641 xhci_print_ir_set(xhci, 0);
643 if (xhci->quirks & XHCI_NEC_HOST) {
644 struct xhci_command *command;
645 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
648 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
649 TRB_TYPE(TRB_NEC_GET_FW));
651 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
652 "Finished xhci_run for USB2 roothub");
655 EXPORT_SYMBOL_GPL(xhci_run);
657 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
659 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
661 spin_lock_irq(&xhci->lock);
663 spin_unlock_irq(&xhci->lock);
669 * This function is called by the USB core when the HC driver is removed.
670 * Its opposite is xhci_run().
672 * Disable device contexts, disable IRQs, and quiesce the HC.
673 * Reset the HC, finish any completed transactions, and cleanup memory.
675 void xhci_stop(struct usb_hcd *hcd)
678 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
680 if (!usb_hcd_is_primary_hcd(hcd)) {
681 xhci_only_stop_hcd(xhci->shared_hcd);
685 spin_lock_irq(&xhci->lock);
686 /* Make sure the xHC is halted for a USB3 roothub
687 * (xhci_stop() could be called as part of failed init).
691 spin_unlock_irq(&xhci->lock);
693 xhci_cleanup_msix(xhci);
695 /* Deleting Compliance Mode Recovery Timer */
696 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
697 (!(xhci_all_ports_seen_u0(xhci)))) {
698 del_timer_sync(&xhci->comp_mode_recovery_timer);
699 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
700 "%s: compliance mode recovery timer deleted",
704 if (xhci->quirks & XHCI_AMD_PLL_FIX)
707 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
708 "// Disabling event ring interrupts");
709 temp = readl(&xhci->op_regs->status);
710 writel(temp & ~STS_EINT, &xhci->op_regs->status);
711 temp = readl(&xhci->ir_set->irq_pending);
712 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
713 xhci_print_ir_set(xhci, 0);
715 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
716 xhci_mem_cleanup(xhci);
717 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
718 "xhci_stop completed - status = %x",
719 readl(&xhci->op_regs->status));
723 * Shutdown HC (not bus-specific)
725 * This is called when the machine is rebooting or halting. We assume that the
726 * machine will be powered off, and the HC's internal state will be reset.
727 * Don't bother to free memory.
729 * This will only ever be called with the main usb_hcd (the USB3 roothub).
731 void xhci_shutdown(struct usb_hcd *hcd)
733 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
735 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
736 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
738 spin_lock_irq(&xhci->lock);
740 /* Workaround for spurious wakeups at shutdown with HSW */
741 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
743 spin_unlock_irq(&xhci->lock);
745 xhci_cleanup_msix(xhci);
747 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
748 "xhci_shutdown completed - status = %x",
749 readl(&xhci->op_regs->status));
751 /* Yet another workaround for spurious wakeups at shutdown with HSW */
752 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
753 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
757 static void xhci_save_registers(struct xhci_hcd *xhci)
759 xhci->s3.command = readl(&xhci->op_regs->command);
760 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
761 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
762 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
763 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
764 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
765 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
766 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
767 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
770 static void xhci_restore_registers(struct xhci_hcd *xhci)
772 writel(xhci->s3.command, &xhci->op_regs->command);
773 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
774 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
775 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
776 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
777 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
778 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
779 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
780 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
783 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
787 /* step 2: initialize command ring buffer */
788 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
789 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
790 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
791 xhci->cmd_ring->dequeue) &
792 (u64) ~CMD_RING_RSVD_BITS) |
793 xhci->cmd_ring->cycle_state;
794 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
795 "// Setting command ring address to 0x%llx",
796 (long unsigned long) val_64);
797 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
801 * The whole command ring must be cleared to zero when we suspend the host.
803 * The host doesn't save the command ring pointer in the suspend well, so we
804 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
805 * aligned, because of the reserved bits in the command ring dequeue pointer
806 * register. Therefore, we can't just set the dequeue pointer back in the
807 * middle of the ring (TRBs are 16-byte aligned).
809 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
811 struct xhci_ring *ring;
812 struct xhci_segment *seg;
814 ring = xhci->cmd_ring;
818 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
819 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
820 cpu_to_le32(~TRB_CYCLE);
822 } while (seg != ring->deq_seg);
824 /* Reset the software enqueue and dequeue pointers */
825 ring->deq_seg = ring->first_seg;
826 ring->dequeue = ring->first_seg->trbs;
827 ring->enq_seg = ring->deq_seg;
828 ring->enqueue = ring->dequeue;
830 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
832 * Ring is now zeroed, so the HW should look for change of ownership
833 * when the cycle bit is set to 1.
835 ring->cycle_state = 1;
838 * Reset the hardware dequeue pointer.
839 * Yes, this will need to be re-written after resume, but we're paranoid
840 * and want to make sure the hardware doesn't access bogus memory
841 * because, say, the BIOS or an SMI started the host without changing
842 * the command ring pointers.
844 xhci_set_cmd_ring_deq(xhci);
847 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
850 __le32 __iomem **port_array;
854 spin_lock_irqsave(&xhci->lock, flags);
856 /* disble usb3 ports Wake bits*/
857 port_index = xhci->num_usb3_ports;
858 port_array = xhci->usb3_ports;
859 while (port_index--) {
860 t1 = readl(port_array[port_index]);
861 t1 = xhci_port_state_to_neutral(t1);
862 t2 = t1 & ~PORT_WAKE_BITS;
864 writel(t2, port_array[port_index]);
867 /* disble usb2 ports Wake bits*/
868 port_index = xhci->num_usb2_ports;
869 port_array = xhci->usb2_ports;
870 while (port_index--) {
871 t1 = readl(port_array[port_index]);
872 t1 = xhci_port_state_to_neutral(t1);
873 t2 = t1 & ~PORT_WAKE_BITS;
875 writel(t2, port_array[port_index]);
878 spin_unlock_irqrestore(&xhci->lock, flags);
882 * Stop HC (not bus-specific)
884 * This is called when the machine transition into S3/S4 mode.
887 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
890 unsigned int delay = XHCI_MAX_HALT_USEC;
891 struct usb_hcd *hcd = xhci_to_hcd(xhci);
894 if (hcd->state != HC_STATE_SUSPENDED ||
895 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
898 /* Clear root port wake on bits if wakeup not allowed. */
900 xhci_disable_port_wake_on_bits(xhci);
902 /* Don't poll the roothubs on bus suspend. */
903 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
904 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
905 del_timer_sync(&hcd->rh_timer);
906 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
907 del_timer_sync(&xhci->shared_hcd->rh_timer);
909 spin_lock_irq(&xhci->lock);
910 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
911 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
912 /* step 1: stop endpoint */
913 /* skipped assuming that port suspend has done */
915 /* step 2: clear Run/Stop bit */
916 command = readl(&xhci->op_regs->command);
918 writel(command, &xhci->op_regs->command);
920 /* Some chips from Fresco Logic need an extraordinary delay */
921 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
923 if (xhci_handshake(&xhci->op_regs->status,
924 STS_HALT, STS_HALT, delay)) {
925 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
926 spin_unlock_irq(&xhci->lock);
929 xhci_clear_command_ring(xhci);
931 /* step 3: save registers */
932 xhci_save_registers(xhci);
934 /* step 4: set CSS flag */
935 command = readl(&xhci->op_regs->command);
937 writel(command, &xhci->op_regs->command);
938 if (xhci_handshake(&xhci->op_regs->status,
939 STS_SAVE, 0, 10 * 1000)) {
940 xhci_warn(xhci, "WARN: xHC save state timeout\n");
941 spin_unlock_irq(&xhci->lock);
944 spin_unlock_irq(&xhci->lock);
947 * Deleting Compliance Mode Recovery Timer because the xHCI Host
948 * is about to be suspended.
950 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
951 (!(xhci_all_ports_seen_u0(xhci)))) {
952 del_timer_sync(&xhci->comp_mode_recovery_timer);
953 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
954 "%s: compliance mode recovery timer deleted",
958 /* step 5: remove core well power */
959 /* synchronize irq when using MSI-X */
960 xhci_msix_sync_irqs(xhci);
964 EXPORT_SYMBOL_GPL(xhci_suspend);
967 * start xHC (not bus-specific)
969 * This is called when the machine transition from S3/S4 mode.
972 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
974 u32 command, temp = 0, status;
975 struct usb_hcd *hcd = xhci_to_hcd(xhci);
976 struct usb_hcd *secondary_hcd;
978 bool comp_timer_running = false;
980 /* Wait a bit if either of the roothubs need to settle from the
981 * transition into bus suspend.
983 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
985 xhci->bus_state[1].next_statechange))
988 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
989 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
991 spin_lock_irq(&xhci->lock);
992 if (xhci->quirks & XHCI_RESET_ON_RESUME)
996 /* step 1: restore register */
997 xhci_restore_registers(xhci);
998 /* step 2: initialize command ring buffer */
999 xhci_set_cmd_ring_deq(xhci);
1000 /* step 3: restore state and start state*/
1001 /* step 3: set CRS flag */
1002 command = readl(&xhci->op_regs->command);
1004 writel(command, &xhci->op_regs->command);
1005 if (xhci_handshake(&xhci->op_regs->status,
1006 STS_RESTORE, 0, 10 * 1000)) {
1007 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1008 spin_unlock_irq(&xhci->lock);
1011 temp = readl(&xhci->op_regs->status);
1014 /* If restore operation fails, re-initialize the HC during resume */
1015 if ((temp & STS_SRE) || hibernated) {
1017 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1018 !(xhci_all_ports_seen_u0(xhci))) {
1019 del_timer_sync(&xhci->comp_mode_recovery_timer);
1020 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1021 "Compliance Mode Recovery Timer deleted!");
1024 /* Let the USB core know _both_ roothubs lost power. */
1025 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1026 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1028 xhci_dbg(xhci, "Stop HCD\n");
1031 spin_unlock_irq(&xhci->lock);
1032 xhci_cleanup_msix(xhci);
1034 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1035 temp = readl(&xhci->op_regs->status);
1036 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1037 temp = readl(&xhci->ir_set->irq_pending);
1038 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1039 xhci_print_ir_set(xhci, 0);
1041 xhci_dbg(xhci, "cleaning up memory\n");
1042 xhci_mem_cleanup(xhci);
1043 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1044 readl(&xhci->op_regs->status));
1046 /* USB core calls the PCI reinit and start functions twice:
1047 * first with the primary HCD, and then with the secondary HCD.
1048 * If we don't do the same, the host will never be started.
1050 if (!usb_hcd_is_primary_hcd(hcd))
1051 secondary_hcd = hcd;
1053 secondary_hcd = xhci->shared_hcd;
1055 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1056 retval = xhci_init(hcd->primary_hcd);
1059 comp_timer_running = true;
1061 xhci_dbg(xhci, "Start the primary HCD\n");
1062 retval = xhci_run(hcd->primary_hcd);
1064 xhci_dbg(xhci, "Start the secondary HCD\n");
1065 retval = xhci_run(secondary_hcd);
1067 hcd->state = HC_STATE_SUSPENDED;
1068 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1072 /* step 4: set Run/Stop bit */
1073 command = readl(&xhci->op_regs->command);
1075 writel(command, &xhci->op_regs->command);
1076 xhci_handshake(&xhci->op_regs->status, STS_HALT,
1079 /* step 5: walk topology and initialize portsc,
1080 * portpmsc and portli
1082 /* this is done in bus_resume */
1084 /* step 6: restart each of the previously
1085 * Running endpoints by ringing their doorbells
1088 spin_unlock_irq(&xhci->lock);
1092 /* Resume root hubs only when have pending events. */
1093 status = readl(&xhci->op_regs->status);
1094 if (status & STS_EINT) {
1095 usb_hcd_resume_root_hub(hcd);
1096 usb_hcd_resume_root_hub(xhci->shared_hcd);
1101 * If system is subject to the Quirk, Compliance Mode Timer needs to
1102 * be re-initialized Always after a system resume. Ports are subject
1103 * to suffer the Compliance Mode issue again. It doesn't matter if
1104 * ports have entered previously to U0 before system's suspension.
1106 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1107 compliance_mode_recovery_timer_init(xhci);
1109 /* Re-enable port polling. */
1110 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1111 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1112 usb_hcd_poll_rh_status(hcd);
1113 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1114 usb_hcd_poll_rh_status(xhci->shared_hcd);
1118 EXPORT_SYMBOL_GPL(xhci_resume);
1119 #endif /* CONFIG_PM */
1121 /*-------------------------------------------------------------------------*/
1124 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1125 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1126 * value to right shift 1 for the bitmask.
1128 * Index = (epnum * 2) + direction - 1,
1129 * where direction = 0 for OUT, 1 for IN.
1130 * For control endpoints, the IN index is used (OUT index is unused), so
1131 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1133 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1136 if (usb_endpoint_xfer_control(desc))
1137 index = (unsigned int) (usb_endpoint_num(desc)*2);
1139 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1140 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1144 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1145 * address from the XHCI endpoint index.
1147 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1149 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1150 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1151 return direction | number;
1154 /* Find the flag for this endpoint (for use in the control context). Use the
1155 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1158 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1160 return 1 << (xhci_get_endpoint_index(desc) + 1);
1163 /* Find the flag for this endpoint (for use in the control context). Use the
1164 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1167 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1169 return 1 << (ep_index + 1);
1172 /* Compute the last valid endpoint context index. Basically, this is the
1173 * endpoint index plus one. For slot contexts with more than valid endpoint,
1174 * we find the most significant bit set in the added contexts flags.
1175 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1176 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1178 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1180 return fls(added_ctxs) - 1;
1183 /* Returns 1 if the arguments are OK;
1184 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1186 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1187 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1189 struct xhci_hcd *xhci;
1190 struct xhci_virt_device *virt_dev;
1192 if (!hcd || (check_ep && !ep) || !udev) {
1193 pr_debug("xHCI %s called with invalid args\n", func);
1196 if (!udev->parent) {
1197 pr_debug("xHCI %s called for root hub\n", func);
1201 xhci = hcd_to_xhci(hcd);
1202 if (check_virt_dev) {
1203 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1204 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1209 virt_dev = xhci->devs[udev->slot_id];
1210 if (virt_dev->udev != udev) {
1211 xhci_dbg(xhci, "xHCI %s called with udev and "
1212 "virt_dev does not match\n", func);
1217 if (xhci->xhc_state & XHCI_STATE_HALTED)
1223 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1224 struct usb_device *udev, struct xhci_command *command,
1225 bool ctx_change, bool must_succeed);
1228 * Full speed devices may have a max packet size greater than 8 bytes, but the
1229 * USB core doesn't know that until it reads the first 8 bytes of the
1230 * descriptor. If the usb_device's max packet size changes after that point,
1231 * we need to issue an evaluate context command and wait on it.
1233 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1234 unsigned int ep_index, struct urb *urb)
1236 struct xhci_container_ctx *out_ctx;
1237 struct xhci_input_control_ctx *ctrl_ctx;
1238 struct xhci_ep_ctx *ep_ctx;
1239 struct xhci_command *command;
1240 int max_packet_size;
1241 int hw_max_packet_size;
1244 out_ctx = xhci->devs[slot_id]->out_ctx;
1245 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1246 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1247 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1248 if (hw_max_packet_size != max_packet_size) {
1249 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1250 "Max Packet Size for ep 0 changed.");
1251 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1252 "Max packet size in usb_device = %d",
1254 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1255 "Max packet size in xHCI HW = %d",
1256 hw_max_packet_size);
1257 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1258 "Issuing evaluate context command.");
1260 /* Set up the input context flags for the command */
1261 /* FIXME: This won't work if a non-default control endpoint
1262 * changes max packet sizes.
1265 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1269 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1270 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1272 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1275 goto command_cleanup;
1277 /* Set up the modified control endpoint 0 */
1278 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1279 xhci->devs[slot_id]->out_ctx, ep_index);
1281 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1282 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1283 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1285 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1286 ctrl_ctx->drop_flags = 0;
1288 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1289 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1290 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1291 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1293 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1296 /* Clean up the input context for later use by bandwidth
1299 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1301 kfree(command->completion);
1308 * non-error returns are a promise to giveback() the urb later
1309 * we drop ownership so next owner (or urb unlink) can get it
1311 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1313 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1314 struct xhci_td *buffer;
1315 unsigned long flags;
1317 unsigned int slot_id, ep_index;
1318 struct urb_priv *urb_priv;
1321 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1322 true, true, __func__) <= 0)
1325 slot_id = urb->dev->slot_id;
1326 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1328 if (!HCD_HW_ACCESSIBLE(hcd)) {
1329 if (!in_interrupt())
1330 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1335 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1336 size = urb->number_of_packets;
1340 urb_priv = kzalloc(sizeof(struct urb_priv) +
1341 size * sizeof(struct xhci_td *), mem_flags);
1345 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1351 for (i = 0; i < size; i++) {
1352 urb_priv->td[i] = buffer;
1356 urb_priv->length = size;
1357 urb_priv->td_cnt = 0;
1358 urb->hcpriv = urb_priv;
1360 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1361 /* Check to see if the max packet size for the default control
1362 * endpoint changed during FS device enumeration
1364 if (urb->dev->speed == USB_SPEED_FULL) {
1365 ret = xhci_check_maxpacket(xhci, slot_id,
1368 xhci_urb_free_priv(urb_priv);
1374 /* We have a spinlock and interrupts disabled, so we must pass
1375 * atomic context to this function, which may allocate memory.
1377 spin_lock_irqsave(&xhci->lock, flags);
1378 if (xhci->xhc_state & XHCI_STATE_DYING)
1380 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1384 spin_unlock_irqrestore(&xhci->lock, flags);
1385 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1386 spin_lock_irqsave(&xhci->lock, flags);
1387 if (xhci->xhc_state & XHCI_STATE_DYING)
1389 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1390 EP_GETTING_STREAMS) {
1391 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1392 "is transitioning to using streams.\n");
1394 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1395 EP_GETTING_NO_STREAMS) {
1396 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1397 "is transitioning to "
1398 "not having streams.\n");
1401 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1406 spin_unlock_irqrestore(&xhci->lock, flags);
1407 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1408 spin_lock_irqsave(&xhci->lock, flags);
1409 if (xhci->xhc_state & XHCI_STATE_DYING)
1411 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1415 spin_unlock_irqrestore(&xhci->lock, flags);
1417 spin_lock_irqsave(&xhci->lock, flags);
1418 if (xhci->xhc_state & XHCI_STATE_DYING)
1420 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1424 spin_unlock_irqrestore(&xhci->lock, flags);
1429 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1430 "non-responsive xHCI host.\n",
1431 urb->ep->desc.bEndpointAddress, urb);
1434 xhci_urb_free_priv(urb_priv);
1436 spin_unlock_irqrestore(&xhci->lock, flags);
1440 /* Get the right ring for the given URB.
1441 * If the endpoint supports streams, boundary check the URB's stream ID.
1442 * If the endpoint doesn't support streams, return the singular endpoint ring.
1444 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1447 unsigned int slot_id;
1448 unsigned int ep_index;
1449 unsigned int stream_id;
1450 struct xhci_virt_ep *ep;
1452 slot_id = urb->dev->slot_id;
1453 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1454 stream_id = urb->stream_id;
1455 ep = &xhci->devs[slot_id]->eps[ep_index];
1456 /* Common case: no streams */
1457 if (!(ep->ep_state & EP_HAS_STREAMS))
1460 if (stream_id == 0) {
1462 "WARN: Slot ID %u, ep index %u has streams, "
1463 "but URB has no stream ID.\n",
1468 if (stream_id < ep->stream_info->num_streams)
1469 return ep->stream_info->stream_rings[stream_id];
1472 "WARN: Slot ID %u, ep index %u has "
1473 "stream IDs 1 to %u allocated, "
1474 "but stream ID %u is requested.\n",
1476 ep->stream_info->num_streams - 1,
1482 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1483 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1484 * should pick up where it left off in the TD, unless a Set Transfer Ring
1485 * Dequeue Pointer is issued.
1487 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1488 * the ring. Since the ring is a contiguous structure, they can't be physically
1489 * removed. Instead, there are two options:
1491 * 1) If the HC is in the middle of processing the URB to be canceled, we
1492 * simply move the ring's dequeue pointer past those TRBs using the Set
1493 * Transfer Ring Dequeue Pointer command. This will be the common case,
1494 * when drivers timeout on the last submitted URB and attempt to cancel.
1496 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1497 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1498 * HC will need to invalidate the any TRBs it has cached after the stop
1499 * endpoint command, as noted in the xHCI 0.95 errata.
1501 * 3) The TD may have completed by the time the Stop Endpoint Command
1502 * completes, so software needs to handle that case too.
1504 * This function should protect against the TD enqueueing code ringing the
1505 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1506 * It also needs to account for multiple cancellations on happening at the same
1507 * time for the same endpoint.
1509 * Note that this function can be called in any context, or so says
1510 * usb_hcd_unlink_urb()
1512 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1514 unsigned long flags;
1517 struct xhci_hcd *xhci;
1518 struct urb_priv *urb_priv;
1520 unsigned int ep_index;
1521 struct xhci_ring *ep_ring;
1522 struct xhci_virt_ep *ep;
1523 struct xhci_command *command;
1525 xhci = hcd_to_xhci(hcd);
1526 spin_lock_irqsave(&xhci->lock, flags);
1527 /* Make sure the URB hasn't completed or been unlinked already */
1528 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1529 if (ret || !urb->hcpriv)
1531 temp = readl(&xhci->op_regs->status);
1532 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1533 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1534 "HW died, freeing TD.");
1535 urb_priv = urb->hcpriv;
1536 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1537 td = urb_priv->td[i];
1538 if (!list_empty(&td->td_list))
1539 list_del_init(&td->td_list);
1540 if (!list_empty(&td->cancelled_td_list))
1541 list_del_init(&td->cancelled_td_list);
1544 usb_hcd_unlink_urb_from_ep(hcd, urb);
1545 spin_unlock_irqrestore(&xhci->lock, flags);
1546 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1547 xhci_urb_free_priv(urb_priv);
1550 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1551 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1552 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1553 "Ep 0x%x: URB %p to be canceled on "
1554 "non-responsive xHCI host.",
1555 urb->ep->desc.bEndpointAddress, urb);
1556 /* Let the stop endpoint command watchdog timer (which set this
1557 * state) finish cleaning up the endpoint TD lists. We must
1558 * have caught it in the middle of dropping a lock and giving
1564 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1565 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1566 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1572 urb_priv = urb->hcpriv;
1573 i = urb_priv->td_cnt;
1574 if (i < urb_priv->length)
1575 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1576 "Cancel URB %p, dev %s, ep 0x%x, "
1577 "starting at offset 0x%llx",
1578 urb, urb->dev->devpath,
1579 urb->ep->desc.bEndpointAddress,
1580 (unsigned long long) xhci_trb_virt_to_dma(
1581 urb_priv->td[i]->start_seg,
1582 urb_priv->td[i]->first_trb));
1584 for (; i < urb_priv->length; i++) {
1585 td = urb_priv->td[i];
1586 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1589 /* Queue a stop endpoint command, but only if this is
1590 * the first cancellation to be handled.
1592 if (!(ep->ep_state & EP_HALT_PENDING)) {
1593 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1598 ep->ep_state |= EP_HALT_PENDING;
1599 ep->stop_cmds_pending++;
1600 ep->stop_cmd_timer.expires = jiffies +
1601 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1602 add_timer(&ep->stop_cmd_timer);
1603 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1605 xhci_ring_cmd_db(xhci);
1608 spin_unlock_irqrestore(&xhci->lock, flags);
1612 /* Drop an endpoint from a new bandwidth configuration for this device.
1613 * Only one call to this function is allowed per endpoint before
1614 * check_bandwidth() or reset_bandwidth() must be called.
1615 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1616 * add the endpoint to the schedule with possibly new parameters denoted by a
1617 * different endpoint descriptor in usb_host_endpoint.
1618 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1621 * The USB core will not allow URBs to be queued to an endpoint that is being
1622 * disabled, so there's no need for mutual exclusion to protect
1623 * the xhci->devs[slot_id] structure.
1625 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1626 struct usb_host_endpoint *ep)
1628 struct xhci_hcd *xhci;
1629 struct xhci_container_ctx *in_ctx, *out_ctx;
1630 struct xhci_input_control_ctx *ctrl_ctx;
1631 unsigned int ep_index;
1632 struct xhci_ep_ctx *ep_ctx;
1634 u32 new_add_flags, new_drop_flags;
1637 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1640 xhci = hcd_to_xhci(hcd);
1641 if (xhci->xhc_state & XHCI_STATE_DYING)
1644 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1645 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1646 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1647 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1648 __func__, drop_flag);
1652 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1653 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1654 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1656 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1661 ep_index = xhci_get_endpoint_index(&ep->desc);
1662 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1663 /* If the HC already knows the endpoint is disabled,
1664 * or the HCD has noted it is disabled, ignore this request
1666 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1667 cpu_to_le32(EP_STATE_DISABLED)) ||
1668 le32_to_cpu(ctrl_ctx->drop_flags) &
1669 xhci_get_endpoint_flag(&ep->desc)) {
1670 /* Do not warn when called after a usb_device_reset */
1671 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1672 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1677 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1678 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1680 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1681 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1683 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1685 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1686 (unsigned int) ep->desc.bEndpointAddress,
1688 (unsigned int) new_drop_flags,
1689 (unsigned int) new_add_flags);
1693 /* Add an endpoint to a new possible bandwidth configuration for this device.
1694 * Only one call to this function is allowed per endpoint before
1695 * check_bandwidth() or reset_bandwidth() must be called.
1696 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1697 * add the endpoint to the schedule with possibly new parameters denoted by a
1698 * different endpoint descriptor in usb_host_endpoint.
1699 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1702 * The USB core will not allow URBs to be queued to an endpoint until the
1703 * configuration or alt setting is installed in the device, so there's no need
1704 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1706 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1707 struct usb_host_endpoint *ep)
1709 struct xhci_hcd *xhci;
1710 struct xhci_container_ctx *in_ctx;
1711 unsigned int ep_index;
1712 struct xhci_input_control_ctx *ctrl_ctx;
1714 u32 new_add_flags, new_drop_flags;
1715 struct xhci_virt_device *virt_dev;
1718 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1720 /* So we won't queue a reset ep command for a root hub */
1724 xhci = hcd_to_xhci(hcd);
1725 if (xhci->xhc_state & XHCI_STATE_DYING)
1728 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1729 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1730 /* FIXME when we have to issue an evaluate endpoint command to
1731 * deal with ep0 max packet size changing once we get the
1734 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1735 __func__, added_ctxs);
1739 virt_dev = xhci->devs[udev->slot_id];
1740 in_ctx = virt_dev->in_ctx;
1741 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1743 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1748 ep_index = xhci_get_endpoint_index(&ep->desc);
1749 /* If this endpoint is already in use, and the upper layers are trying
1750 * to add it again without dropping it, reject the addition.
1752 if (virt_dev->eps[ep_index].ring &&
1753 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
1754 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1755 "without dropping it.\n",
1756 (unsigned int) ep->desc.bEndpointAddress);
1760 /* If the HCD has already noted the endpoint is enabled,
1761 * ignore this request.
1763 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
1764 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1770 * Configuration and alternate setting changes must be done in
1771 * process context, not interrupt context (or so documenation
1772 * for usb_set_interface() and usb_set_configuration() claim).
1774 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1775 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1776 __func__, ep->desc.bEndpointAddress);
1780 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1781 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1783 /* If xhci_endpoint_disable() was called for this endpoint, but the
1784 * xHC hasn't been notified yet through the check_bandwidth() call,
1785 * this re-adds a new state for the endpoint from the new endpoint
1786 * descriptors. We must drop and re-add this endpoint, so we leave the
1789 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1791 /* Store the usb_device pointer for later use */
1794 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1795 (unsigned int) ep->desc.bEndpointAddress,
1797 (unsigned int) new_drop_flags,
1798 (unsigned int) new_add_flags);
1802 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1804 struct xhci_input_control_ctx *ctrl_ctx;
1805 struct xhci_ep_ctx *ep_ctx;
1806 struct xhci_slot_ctx *slot_ctx;
1809 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1811 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1816 /* When a device's add flag and drop flag are zero, any subsequent
1817 * configure endpoint command will leave that endpoint's state
1818 * untouched. Make sure we don't leave any old state in the input
1819 * endpoint contexts.
1821 ctrl_ctx->drop_flags = 0;
1822 ctrl_ctx->add_flags = 0;
1823 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1824 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1825 /* Endpoint 0 is always valid */
1826 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1827 for (i = 1; i < 31; ++i) {
1828 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1829 ep_ctx->ep_info = 0;
1830 ep_ctx->ep_info2 = 0;
1832 ep_ctx->tx_info = 0;
1836 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1837 struct usb_device *udev, u32 *cmd_status)
1841 switch (*cmd_status) {
1842 case COMP_CMD_ABORT:
1844 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1848 dev_warn(&udev->dev,
1849 "Not enough host controller resources for new device state.\n");
1851 /* FIXME: can we allocate more resources for the HC? */
1854 case COMP_2ND_BW_ERR:
1855 dev_warn(&udev->dev,
1856 "Not enough bandwidth for new device state.\n");
1858 /* FIXME: can we go back to the old state? */
1861 /* the HCD set up something wrong */
1862 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1864 "and endpoint is not disabled.\n");
1868 dev_warn(&udev->dev,
1869 "ERROR: Incompatible device for endpoint configure command.\n");
1873 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1874 "Successful Endpoint Configure command");
1878 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1886 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1887 struct usb_device *udev, u32 *cmd_status)
1890 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1892 switch (*cmd_status) {
1893 case COMP_CMD_ABORT:
1895 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1899 dev_warn(&udev->dev,
1900 "WARN: xHCI driver setup invalid evaluate context command.\n");
1904 dev_warn(&udev->dev,
1905 "WARN: slot not enabled for evaluate context command.\n");
1908 case COMP_CTX_STATE:
1909 dev_warn(&udev->dev,
1910 "WARN: invalid context state for evaluate context command.\n");
1911 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1915 dev_warn(&udev->dev,
1916 "ERROR: Incompatible device for evaluate context command.\n");
1920 /* Max Exit Latency too large error */
1921 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1925 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1926 "Successful evaluate context command");
1930 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1938 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1939 struct xhci_input_control_ctx *ctrl_ctx)
1941 u32 valid_add_flags;
1942 u32 valid_drop_flags;
1944 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1945 * (bit 1). The default control endpoint is added during the Address
1946 * Device command and is never removed until the slot is disabled.
1948 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1949 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1951 /* Use hweight32 to count the number of ones in the add flags, or
1952 * number of endpoints added. Don't count endpoints that are changed
1953 * (both added and dropped).
1955 return hweight32(valid_add_flags) -
1956 hweight32(valid_add_flags & valid_drop_flags);
1959 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1960 struct xhci_input_control_ctx *ctrl_ctx)
1962 u32 valid_add_flags;
1963 u32 valid_drop_flags;
1965 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1966 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1968 return hweight32(valid_drop_flags) -
1969 hweight32(valid_add_flags & valid_drop_flags);
1973 * We need to reserve the new number of endpoints before the configure endpoint
1974 * command completes. We can't subtract the dropped endpoints from the number
1975 * of active endpoints until the command completes because we can oversubscribe
1976 * the host in this case:
1978 * - the first configure endpoint command drops more endpoints than it adds
1979 * - a second configure endpoint command that adds more endpoints is queued
1980 * - the first configure endpoint command fails, so the config is unchanged
1981 * - the second command may succeed, even though there isn't enough resources
1983 * Must be called with xhci->lock held.
1985 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1986 struct xhci_input_control_ctx *ctrl_ctx)
1990 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1991 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1992 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1993 "Not enough ep ctxs: "
1994 "%u active, need to add %u, limit is %u.",
1995 xhci->num_active_eps, added_eps,
1996 xhci->limit_active_eps);
1999 xhci->num_active_eps += added_eps;
2000 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2001 "Adding %u ep ctxs, %u now active.", added_eps,
2002 xhci->num_active_eps);
2007 * The configure endpoint was failed by the xHC for some other reason, so we
2008 * need to revert the resources that failed configuration would have used.
2010 * Must be called with xhci->lock held.
2012 static void xhci_free_host_resources(struct xhci_hcd *xhci,
2013 struct xhci_input_control_ctx *ctrl_ctx)
2017 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2018 xhci->num_active_eps -= num_failed_eps;
2019 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2020 "Removing %u failed ep ctxs, %u now active.",
2022 xhci->num_active_eps);
2026 * Now that the command has completed, clean up the active endpoint count by
2027 * subtracting out the endpoints that were dropped (but not changed).
2029 * Must be called with xhci->lock held.
2031 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2032 struct xhci_input_control_ctx *ctrl_ctx)
2034 u32 num_dropped_eps;
2036 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2037 xhci->num_active_eps -= num_dropped_eps;
2038 if (num_dropped_eps)
2039 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2040 "Removing %u dropped ep ctxs, %u now active.",
2042 xhci->num_active_eps);
2045 static unsigned int xhci_get_block_size(struct usb_device *udev)
2047 switch (udev->speed) {
2049 case USB_SPEED_FULL:
2051 case USB_SPEED_HIGH:
2053 case USB_SPEED_SUPER:
2055 case USB_SPEED_UNKNOWN:
2056 case USB_SPEED_WIRELESS:
2058 /* Should never happen */
2064 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2066 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2068 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2073 /* If we are changing a LS/FS device under a HS hub,
2074 * make sure (if we are activating a new TT) that the HS bus has enough
2075 * bandwidth for this new TT.
2077 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2078 struct xhci_virt_device *virt_dev,
2081 struct xhci_interval_bw_table *bw_table;
2082 struct xhci_tt_bw_info *tt_info;
2084 /* Find the bandwidth table for the root port this TT is attached to. */
2085 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2086 tt_info = virt_dev->tt_info;
2087 /* If this TT already had active endpoints, the bandwidth for this TT
2088 * has already been added. Removing all periodic endpoints (and thus
2089 * making the TT enactive) will only decrease the bandwidth used.
2093 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2094 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2098 /* Not sure why we would have no new active endpoints...
2100 * Maybe because of an Evaluate Context change for a hub update or a
2101 * control endpoint 0 max packet size change?
2102 * FIXME: skip the bandwidth calculation in that case.
2107 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2108 struct xhci_virt_device *virt_dev)
2110 unsigned int bw_reserved;
2112 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2113 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2116 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2117 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2124 * This algorithm is a very conservative estimate of the worst-case scheduling
2125 * scenario for any one interval. The hardware dynamically schedules the
2126 * packets, so we can't tell which microframe could be the limiting factor in
2127 * the bandwidth scheduling. This only takes into account periodic endpoints.
2129 * Obviously, we can't solve an NP complete problem to find the minimum worst
2130 * case scenario. Instead, we come up with an estimate that is no less than
2131 * the worst case bandwidth used for any one microframe, but may be an
2134 * We walk the requirements for each endpoint by interval, starting with the
2135 * smallest interval, and place packets in the schedule where there is only one
2136 * possible way to schedule packets for that interval. In order to simplify
2137 * this algorithm, we record the largest max packet size for each interval, and
2138 * assume all packets will be that size.
2140 * For interval 0, we obviously must schedule all packets for each interval.
2141 * The bandwidth for interval 0 is just the amount of data to be transmitted
2142 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2143 * the number of packets).
2145 * For interval 1, we have two possible microframes to schedule those packets
2146 * in. For this algorithm, if we can schedule the same number of packets for
2147 * each possible scheduling opportunity (each microframe), we will do so. The
2148 * remaining number of packets will be saved to be transmitted in the gaps in
2149 * the next interval's scheduling sequence.
2151 * As we move those remaining packets to be scheduled with interval 2 packets,
2152 * we have to double the number of remaining packets to transmit. This is
2153 * because the intervals are actually powers of 2, and we would be transmitting
2154 * the previous interval's packets twice in this interval. We also have to be
2155 * sure that when we look at the largest max packet size for this interval, we
2156 * also look at the largest max packet size for the remaining packets and take
2157 * the greater of the two.
2159 * The algorithm continues to evenly distribute packets in each scheduling
2160 * opportunity, and push the remaining packets out, until we get to the last
2161 * interval. Then those packets and their associated overhead are just added
2162 * to the bandwidth used.
2164 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2165 struct xhci_virt_device *virt_dev,
2168 unsigned int bw_reserved;
2169 unsigned int max_bandwidth;
2170 unsigned int bw_used;
2171 unsigned int block_size;
2172 struct xhci_interval_bw_table *bw_table;
2173 unsigned int packet_size = 0;
2174 unsigned int overhead = 0;
2175 unsigned int packets_transmitted = 0;
2176 unsigned int packets_remaining = 0;
2179 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2180 return xhci_check_ss_bw(xhci, virt_dev);
2182 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2183 max_bandwidth = HS_BW_LIMIT;
2184 /* Convert percent of bus BW reserved to blocks reserved */
2185 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2187 max_bandwidth = FS_BW_LIMIT;
2188 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2191 bw_table = virt_dev->bw_table;
2192 /* We need to translate the max packet size and max ESIT payloads into
2193 * the units the hardware uses.
2195 block_size = xhci_get_block_size(virt_dev->udev);
2197 /* If we are manipulating a LS/FS device under a HS hub, double check
2198 * that the HS bus has enough bandwidth if we are activing a new TT.
2200 if (virt_dev->tt_info) {
2201 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2202 "Recalculating BW for rootport %u",
2203 virt_dev->real_port);
2204 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2205 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2206 "newly activated TT.\n");
2209 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2210 "Recalculating BW for TT slot %u port %u",
2211 virt_dev->tt_info->slot_id,
2212 virt_dev->tt_info->ttport);
2214 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2215 "Recalculating BW for rootport %u",
2216 virt_dev->real_port);
2219 /* Add in how much bandwidth will be used for interval zero, or the
2220 * rounded max ESIT payload + number of packets * largest overhead.
2222 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2223 bw_table->interval_bw[0].num_packets *
2224 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2226 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2227 unsigned int bw_added;
2228 unsigned int largest_mps;
2229 unsigned int interval_overhead;
2232 * How many packets could we transmit in this interval?
2233 * If packets didn't fit in the previous interval, we will need
2234 * to transmit that many packets twice within this interval.
2236 packets_remaining = 2 * packets_remaining +
2237 bw_table->interval_bw[i].num_packets;
2239 /* Find the largest max packet size of this or the previous
2242 if (list_empty(&bw_table->interval_bw[i].endpoints))
2245 struct xhci_virt_ep *virt_ep;
2246 struct list_head *ep_entry;
2248 ep_entry = bw_table->interval_bw[i].endpoints.next;
2249 virt_ep = list_entry(ep_entry,
2250 struct xhci_virt_ep, bw_endpoint_list);
2251 /* Convert to blocks, rounding up */
2252 largest_mps = DIV_ROUND_UP(
2253 virt_ep->bw_info.max_packet_size,
2256 if (largest_mps > packet_size)
2257 packet_size = largest_mps;
2259 /* Use the larger overhead of this or the previous interval. */
2260 interval_overhead = xhci_get_largest_overhead(
2261 &bw_table->interval_bw[i]);
2262 if (interval_overhead > overhead)
2263 overhead = interval_overhead;
2265 /* How many packets can we evenly distribute across
2266 * (1 << (i + 1)) possible scheduling opportunities?
2268 packets_transmitted = packets_remaining >> (i + 1);
2270 /* Add in the bandwidth used for those scheduled packets */
2271 bw_added = packets_transmitted * (overhead + packet_size);
2273 /* How many packets do we have remaining to transmit? */
2274 packets_remaining = packets_remaining % (1 << (i + 1));
2276 /* What largest max packet size should those packets have? */
2277 /* If we've transmitted all packets, don't carry over the
2278 * largest packet size.
2280 if (packets_remaining == 0) {
2283 } else if (packets_transmitted > 0) {
2284 /* Otherwise if we do have remaining packets, and we've
2285 * scheduled some packets in this interval, take the
2286 * largest max packet size from endpoints with this
2289 packet_size = largest_mps;
2290 overhead = interval_overhead;
2292 /* Otherwise carry over packet_size and overhead from the last
2293 * time we had a remainder.
2295 bw_used += bw_added;
2296 if (bw_used > max_bandwidth) {
2297 xhci_warn(xhci, "Not enough bandwidth. "
2298 "Proposed: %u, Max: %u\n",
2299 bw_used, max_bandwidth);
2304 * Ok, we know we have some packets left over after even-handedly
2305 * scheduling interval 15. We don't know which microframes they will
2306 * fit into, so we over-schedule and say they will be scheduled every
2309 if (packets_remaining > 0)
2310 bw_used += overhead + packet_size;
2312 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2313 unsigned int port_index = virt_dev->real_port - 1;
2315 /* OK, we're manipulating a HS device attached to a
2316 * root port bandwidth domain. Include the number of active TTs
2317 * in the bandwidth used.
2319 bw_used += TT_HS_OVERHEAD *
2320 xhci->rh_bw[port_index].num_active_tts;
2323 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2324 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2325 "Available: %u " "percent",
2326 bw_used, max_bandwidth, bw_reserved,
2327 (max_bandwidth - bw_used - bw_reserved) * 100 /
2330 bw_used += bw_reserved;
2331 if (bw_used > max_bandwidth) {
2332 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2333 bw_used, max_bandwidth);
2337 bw_table->bw_used = bw_used;
2341 static bool xhci_is_async_ep(unsigned int ep_type)
2343 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2344 ep_type != ISOC_IN_EP &&
2345 ep_type != INT_IN_EP);
2348 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2350 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2353 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2355 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2357 if (ep_bw->ep_interval == 0)
2358 return SS_OVERHEAD_BURST +
2359 (ep_bw->mult * ep_bw->num_packets *
2360 (SS_OVERHEAD + mps));
2361 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2362 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2363 1 << ep_bw->ep_interval);
2367 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2368 struct xhci_bw_info *ep_bw,
2369 struct xhci_interval_bw_table *bw_table,
2370 struct usb_device *udev,
2371 struct xhci_virt_ep *virt_ep,
2372 struct xhci_tt_bw_info *tt_info)
2374 struct xhci_interval_bw *interval_bw;
2375 int normalized_interval;
2377 if (xhci_is_async_ep(ep_bw->type))
2380 if (udev->speed == USB_SPEED_SUPER) {
2381 if (xhci_is_sync_in_ep(ep_bw->type))
2382 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2383 xhci_get_ss_bw_consumed(ep_bw);
2385 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2386 xhci_get_ss_bw_consumed(ep_bw);
2390 /* SuperSpeed endpoints never get added to intervals in the table, so
2391 * this check is only valid for HS/FS/LS devices.
2393 if (list_empty(&virt_ep->bw_endpoint_list))
2395 /* For LS/FS devices, we need to translate the interval expressed in
2396 * microframes to frames.
2398 if (udev->speed == USB_SPEED_HIGH)
2399 normalized_interval = ep_bw->ep_interval;
2401 normalized_interval = ep_bw->ep_interval - 3;
2403 if (normalized_interval == 0)
2404 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2405 interval_bw = &bw_table->interval_bw[normalized_interval];
2406 interval_bw->num_packets -= ep_bw->num_packets;
2407 switch (udev->speed) {
2409 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2411 case USB_SPEED_FULL:
2412 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2414 case USB_SPEED_HIGH:
2415 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2417 case USB_SPEED_SUPER:
2418 case USB_SPEED_UNKNOWN:
2419 case USB_SPEED_WIRELESS:
2420 /* Should never happen because only LS/FS/HS endpoints will get
2421 * added to the endpoint list.
2426 tt_info->active_eps -= 1;
2427 list_del_init(&virt_ep->bw_endpoint_list);
2430 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2431 struct xhci_bw_info *ep_bw,
2432 struct xhci_interval_bw_table *bw_table,
2433 struct usb_device *udev,
2434 struct xhci_virt_ep *virt_ep,
2435 struct xhci_tt_bw_info *tt_info)
2437 struct xhci_interval_bw *interval_bw;
2438 struct xhci_virt_ep *smaller_ep;
2439 int normalized_interval;
2441 if (xhci_is_async_ep(ep_bw->type))
2444 if (udev->speed == USB_SPEED_SUPER) {
2445 if (xhci_is_sync_in_ep(ep_bw->type))
2446 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2447 xhci_get_ss_bw_consumed(ep_bw);
2449 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2450 xhci_get_ss_bw_consumed(ep_bw);
2454 /* For LS/FS devices, we need to translate the interval expressed in
2455 * microframes to frames.
2457 if (udev->speed == USB_SPEED_HIGH)
2458 normalized_interval = ep_bw->ep_interval;
2460 normalized_interval = ep_bw->ep_interval - 3;
2462 if (normalized_interval == 0)
2463 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2464 interval_bw = &bw_table->interval_bw[normalized_interval];
2465 interval_bw->num_packets += ep_bw->num_packets;
2466 switch (udev->speed) {
2468 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2470 case USB_SPEED_FULL:
2471 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2473 case USB_SPEED_HIGH:
2474 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2476 case USB_SPEED_SUPER:
2477 case USB_SPEED_UNKNOWN:
2478 case USB_SPEED_WIRELESS:
2479 /* Should never happen because only LS/FS/HS endpoints will get
2480 * added to the endpoint list.
2486 tt_info->active_eps += 1;
2487 /* Insert the endpoint into the list, largest max packet size first. */
2488 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2490 if (ep_bw->max_packet_size >=
2491 smaller_ep->bw_info.max_packet_size) {
2492 /* Add the new ep before the smaller endpoint */
2493 list_add_tail(&virt_ep->bw_endpoint_list,
2494 &smaller_ep->bw_endpoint_list);
2498 /* Add the new endpoint at the end of the list. */
2499 list_add_tail(&virt_ep->bw_endpoint_list,
2500 &interval_bw->endpoints);
2503 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2504 struct xhci_virt_device *virt_dev,
2507 struct xhci_root_port_bw_info *rh_bw_info;
2508 if (!virt_dev->tt_info)
2511 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2512 if (old_active_eps == 0 &&
2513 virt_dev->tt_info->active_eps != 0) {
2514 rh_bw_info->num_active_tts += 1;
2515 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2516 } else if (old_active_eps != 0 &&
2517 virt_dev->tt_info->active_eps == 0) {
2518 rh_bw_info->num_active_tts -= 1;
2519 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2523 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2524 struct xhci_virt_device *virt_dev,
2525 struct xhci_container_ctx *in_ctx)
2527 struct xhci_bw_info ep_bw_info[31];
2529 struct xhci_input_control_ctx *ctrl_ctx;
2530 int old_active_eps = 0;
2532 if (virt_dev->tt_info)
2533 old_active_eps = virt_dev->tt_info->active_eps;
2535 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2537 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2542 for (i = 0; i < 31; i++) {
2543 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2546 /* Make a copy of the BW info in case we need to revert this */
2547 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2548 sizeof(ep_bw_info[i]));
2549 /* Drop the endpoint from the interval table if the endpoint is
2550 * being dropped or changed.
2552 if (EP_IS_DROPPED(ctrl_ctx, i))
2553 xhci_drop_ep_from_interval_table(xhci,
2554 &virt_dev->eps[i].bw_info,
2560 /* Overwrite the information stored in the endpoints' bw_info */
2561 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2562 for (i = 0; i < 31; i++) {
2563 /* Add any changed or added endpoints to the interval table */
2564 if (EP_IS_ADDED(ctrl_ctx, i))
2565 xhci_add_ep_to_interval_table(xhci,
2566 &virt_dev->eps[i].bw_info,
2573 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2574 /* Ok, this fits in the bandwidth we have.
2575 * Update the number of active TTs.
2577 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2581 /* We don't have enough bandwidth for this, revert the stored info. */
2582 for (i = 0; i < 31; i++) {
2583 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2586 /* Drop the new copies of any added or changed endpoints from
2587 * the interval table.
2589 if (EP_IS_ADDED(ctrl_ctx, i)) {
2590 xhci_drop_ep_from_interval_table(xhci,
2591 &virt_dev->eps[i].bw_info,
2597 /* Revert the endpoint back to its old information */
2598 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2599 sizeof(ep_bw_info[i]));
2600 /* Add any changed or dropped endpoints back into the table */
2601 if (EP_IS_DROPPED(ctrl_ctx, i))
2602 xhci_add_ep_to_interval_table(xhci,
2603 &virt_dev->eps[i].bw_info,
2613 /* Issue a configure endpoint command or evaluate context command
2614 * and wait for it to finish.
2616 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2617 struct usb_device *udev,
2618 struct xhci_command *command,
2619 bool ctx_change, bool must_succeed)
2622 unsigned long flags;
2623 struct xhci_input_control_ctx *ctrl_ctx;
2624 struct xhci_virt_device *virt_dev;
2629 spin_lock_irqsave(&xhci->lock, flags);
2630 virt_dev = xhci->devs[udev->slot_id];
2632 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2634 spin_unlock_irqrestore(&xhci->lock, flags);
2635 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2640 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2641 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2642 spin_unlock_irqrestore(&xhci->lock, flags);
2643 xhci_warn(xhci, "Not enough host resources, "
2644 "active endpoint contexts = %u\n",
2645 xhci->num_active_eps);
2648 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2649 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2650 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2651 xhci_free_host_resources(xhci, ctrl_ctx);
2652 spin_unlock_irqrestore(&xhci->lock, flags);
2653 xhci_warn(xhci, "Not enough bandwidth\n");
2658 ret = xhci_queue_configure_endpoint(xhci, command,
2659 command->in_ctx->dma,
2660 udev->slot_id, must_succeed);
2662 ret = xhci_queue_evaluate_context(xhci, command,
2663 command->in_ctx->dma,
2664 udev->slot_id, must_succeed);
2666 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2667 xhci_free_host_resources(xhci, ctrl_ctx);
2668 spin_unlock_irqrestore(&xhci->lock, flags);
2669 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2670 "FIXME allocate a new ring segment");
2673 xhci_ring_cmd_db(xhci);
2674 spin_unlock_irqrestore(&xhci->lock, flags);
2676 /* Wait for the configure endpoint command to complete */
2677 wait_for_completion(command->completion);
2680 ret = xhci_configure_endpoint_result(xhci, udev,
2683 ret = xhci_evaluate_context_result(xhci, udev,
2686 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2687 spin_lock_irqsave(&xhci->lock, flags);
2688 /* If the command failed, remove the reserved resources.
2689 * Otherwise, clean up the estimate to include dropped eps.
2692 xhci_free_host_resources(xhci, ctrl_ctx);
2694 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2695 spin_unlock_irqrestore(&xhci->lock, flags);
2700 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2701 struct xhci_virt_device *vdev, int i)
2703 struct xhci_virt_ep *ep = &vdev->eps[i];
2705 if (ep->ep_state & EP_HAS_STREAMS) {
2706 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2707 xhci_get_endpoint_address(i));
2708 xhci_free_stream_info(xhci, ep->stream_info);
2709 ep->stream_info = NULL;
2710 ep->ep_state &= ~EP_HAS_STREAMS;
2714 /* Called after one or more calls to xhci_add_endpoint() or
2715 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2716 * to call xhci_reset_bandwidth().
2718 * Since we are in the middle of changing either configuration or
2719 * installing a new alt setting, the USB core won't allow URBs to be
2720 * enqueued for any endpoint on the old config or interface. Nothing
2721 * else should be touching the xhci->devs[slot_id] structure, so we
2722 * don't need to take the xhci->lock for manipulating that.
2724 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2728 struct xhci_hcd *xhci;
2729 struct xhci_virt_device *virt_dev;
2730 struct xhci_input_control_ctx *ctrl_ctx;
2731 struct xhci_slot_ctx *slot_ctx;
2732 struct xhci_command *command;
2734 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2737 xhci = hcd_to_xhci(hcd);
2738 if (xhci->xhc_state & XHCI_STATE_DYING)
2741 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2742 virt_dev = xhci->devs[udev->slot_id];
2744 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2748 command->in_ctx = virt_dev->in_ctx;
2750 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2751 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2753 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2756 goto command_cleanup;
2758 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2759 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2760 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2762 /* Don't issue the command if there's no endpoints to update. */
2763 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2764 ctrl_ctx->drop_flags == 0) {
2766 goto command_cleanup;
2768 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2769 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2770 for (i = 31; i >= 1; i--) {
2771 __le32 le32 = cpu_to_le32(BIT(i));
2773 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2774 || (ctrl_ctx->add_flags & le32) || i == 1) {
2775 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2776 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2780 xhci_dbg(xhci, "New Input Control Context:\n");
2781 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2782 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2784 ret = xhci_configure_endpoint(xhci, udev, command,
2787 /* Callee should call reset_bandwidth() */
2788 goto command_cleanup;
2790 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2791 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2792 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2794 /* Free any rings that were dropped, but not changed. */
2795 for (i = 1; i < 31; ++i) {
2796 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2797 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2798 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2799 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2802 xhci_zero_in_ctx(xhci, virt_dev);
2804 * Install any rings for completely new endpoints or changed endpoints,
2805 * and free or cache any old rings from changed endpoints.
2807 for (i = 1; i < 31; ++i) {
2808 if (!virt_dev->eps[i].new_ring)
2810 /* Only cache or free the old ring if it exists.
2811 * It may not if this is the first add of an endpoint.
2813 if (virt_dev->eps[i].ring) {
2814 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2816 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2817 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2818 virt_dev->eps[i].new_ring = NULL;
2821 kfree(command->completion);
2827 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2829 struct xhci_hcd *xhci;
2830 struct xhci_virt_device *virt_dev;
2833 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2836 xhci = hcd_to_xhci(hcd);
2838 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2839 virt_dev = xhci->devs[udev->slot_id];
2840 /* Free any rings allocated for added endpoints */
2841 for (i = 0; i < 31; ++i) {
2842 if (virt_dev->eps[i].new_ring) {
2843 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2844 virt_dev->eps[i].new_ring = NULL;
2847 xhci_zero_in_ctx(xhci, virt_dev);
2850 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2851 struct xhci_container_ctx *in_ctx,
2852 struct xhci_container_ctx *out_ctx,
2853 struct xhci_input_control_ctx *ctrl_ctx,
2854 u32 add_flags, u32 drop_flags)
2856 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2857 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2858 xhci_slot_copy(xhci, in_ctx, out_ctx);
2859 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2861 xhci_dbg(xhci, "Input Context:\n");
2862 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2865 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2866 unsigned int slot_id, unsigned int ep_index,
2867 struct xhci_dequeue_state *deq_state)
2869 struct xhci_input_control_ctx *ctrl_ctx;
2870 struct xhci_container_ctx *in_ctx;
2871 struct xhci_ep_ctx *ep_ctx;
2875 in_ctx = xhci->devs[slot_id]->in_ctx;
2876 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2878 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2883 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2884 xhci->devs[slot_id]->out_ctx, ep_index);
2885 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2886 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2887 deq_state->new_deq_ptr);
2889 xhci_warn(xhci, "WARN Cannot submit config ep after "
2890 "reset ep command\n");
2891 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2892 deq_state->new_deq_seg,
2893 deq_state->new_deq_ptr);
2896 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2898 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2899 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2900 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2901 added_ctxs, added_ctxs);
2904 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2905 unsigned int ep_index, struct xhci_td *td)
2907 struct xhci_dequeue_state deq_state;
2908 struct xhci_virt_ep *ep;
2909 struct usb_device *udev = td->urb->dev;
2911 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2912 "Cleaning up stalled endpoint ring");
2913 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2914 /* We need to move the HW's dequeue pointer past this TD,
2915 * or it will attempt to resend it on the next doorbell ring.
2917 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2918 ep_index, ep->stopped_stream, td, &deq_state);
2920 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2923 /* HW with the reset endpoint quirk will use the saved dequeue state to
2924 * issue a configure endpoint command later.
2926 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2927 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2928 "Queueing new dequeue state");
2929 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2930 ep_index, ep->stopped_stream, &deq_state);
2932 /* Better hope no one uses the input context between now and the
2933 * reset endpoint completion!
2934 * XXX: No idea how this hardware will react when stream rings
2937 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2938 "Setting up input context for "
2939 "configure endpoint command");
2940 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2941 ep_index, &deq_state);
2945 /* Called when clearing halted device. The core should have sent the control
2946 * message to clear the device halt condition. The host side of the halt should
2947 * already be cleared with a reset endpoint command issued when the STALL tx
2948 * event was received.
2950 * Context: in_interrupt
2953 void xhci_endpoint_reset(struct usb_hcd *hcd,
2954 struct usb_host_endpoint *ep)
2956 struct xhci_hcd *xhci;
2958 xhci = hcd_to_xhci(hcd);
2961 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2962 * The Reset Endpoint Command may only be issued to endpoints in the
2963 * Halted state. If software wishes reset the Data Toggle or Sequence
2964 * Number of an endpoint that isn't in the Halted state, then software
2965 * may issue a Configure Endpoint Command with the Drop and Add bits set
2966 * for the target endpoint. that is in the Stopped state.
2969 /* For now just print debug to follow the situation */
2970 xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2971 ep->desc.bEndpointAddress);
2974 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2975 struct usb_device *udev, struct usb_host_endpoint *ep,
2976 unsigned int slot_id)
2979 unsigned int ep_index;
2980 unsigned int ep_state;
2984 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2987 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2988 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2989 " descriptor for ep 0x%x does not support streams\n",
2990 ep->desc.bEndpointAddress);
2994 ep_index = xhci_get_endpoint_index(&ep->desc);
2995 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2996 if (ep_state & EP_HAS_STREAMS ||
2997 ep_state & EP_GETTING_STREAMS) {
2998 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2999 "already has streams set up.\n",
3000 ep->desc.bEndpointAddress);
3001 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3002 "dynamic stream context array reallocation.\n");
3005 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3006 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3007 "endpoint 0x%x; URBs are pending.\n",
3008 ep->desc.bEndpointAddress);
3014 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3015 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3017 unsigned int max_streams;
3019 /* The stream context array size must be a power of two */
3020 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3022 * Find out how many primary stream array entries the host controller
3023 * supports. Later we may use secondary stream arrays (similar to 2nd
3024 * level page entries), but that's an optional feature for xHCI host
3025 * controllers. xHCs must support at least 4 stream IDs.
3027 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3028 if (*num_stream_ctxs > max_streams) {
3029 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3031 *num_stream_ctxs = max_streams;
3032 *num_streams = max_streams;
3036 /* Returns an error code if one of the endpoint already has streams.
3037 * This does not change any data structures, it only checks and gathers
3040 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3041 struct usb_device *udev,
3042 struct usb_host_endpoint **eps, unsigned int num_eps,
3043 unsigned int *num_streams, u32 *changed_ep_bitmask)
3045 unsigned int max_streams;
3046 unsigned int endpoint_flag;
3050 for (i = 0; i < num_eps; i++) {
3051 ret = xhci_check_streams_endpoint(xhci, udev,
3052 eps[i], udev->slot_id);
3056 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3057 if (max_streams < (*num_streams - 1)) {
3058 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3059 eps[i]->desc.bEndpointAddress,
3061 *num_streams = max_streams+1;
3064 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3065 if (*changed_ep_bitmask & endpoint_flag)
3067 *changed_ep_bitmask |= endpoint_flag;
3072 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3073 struct usb_device *udev,
3074 struct usb_host_endpoint **eps, unsigned int num_eps)
3076 u32 changed_ep_bitmask = 0;
3077 unsigned int slot_id;
3078 unsigned int ep_index;
3079 unsigned int ep_state;
3082 slot_id = udev->slot_id;
3083 if (!xhci->devs[slot_id])
3086 for (i = 0; i < num_eps; i++) {
3087 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3088 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3089 /* Are streams already being freed for the endpoint? */
3090 if (ep_state & EP_GETTING_NO_STREAMS) {
3091 xhci_warn(xhci, "WARN Can't disable streams for "
3093 "streams are being disabled already\n",
3094 eps[i]->desc.bEndpointAddress);
3097 /* Are there actually any streams to free? */
3098 if (!(ep_state & EP_HAS_STREAMS) &&
3099 !(ep_state & EP_GETTING_STREAMS)) {
3100 xhci_warn(xhci, "WARN Can't disable streams for "
3102 "streams are already disabled!\n",
3103 eps[i]->desc.bEndpointAddress);
3104 xhci_warn(xhci, "WARN xhci_free_streams() called "
3105 "with non-streams endpoint\n");
3108 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3110 return changed_ep_bitmask;
3114 * The USB device drivers use this function (though the HCD interface in USB
3115 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3116 * coordinate mass storage command queueing across multiple endpoints (basically
3117 * a stream ID == a task ID).
3119 * Setting up streams involves allocating the same size stream context array
3120 * for each endpoint and issuing a configure endpoint command for all endpoints.
3122 * Don't allow the call to succeed if one endpoint only supports one stream
3123 * (which means it doesn't support streams at all).
3125 * Drivers may get less stream IDs than they asked for, if the host controller
3126 * hardware or endpoints claim they can't support the number of requested
3129 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3130 struct usb_host_endpoint **eps, unsigned int num_eps,
3131 unsigned int num_streams, gfp_t mem_flags)
3134 struct xhci_hcd *xhci;
3135 struct xhci_virt_device *vdev;
3136 struct xhci_command *config_cmd;
3137 struct xhci_input_control_ctx *ctrl_ctx;
3138 unsigned int ep_index;
3139 unsigned int num_stream_ctxs;
3140 unsigned long flags;
3141 u32 changed_ep_bitmask = 0;
3146 /* Add one to the number of streams requested to account for
3147 * stream 0 that is reserved for xHCI usage.
3150 xhci = hcd_to_xhci(hcd);
3151 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3154 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3155 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3156 HCC_MAX_PSA(xhci->hcc_params) < 4) {
3157 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3161 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3163 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3166 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3168 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3170 xhci_free_command(xhci, config_cmd);
3174 /* Check to make sure all endpoints are not already configured for
3175 * streams. While we're at it, find the maximum number of streams that
3176 * all the endpoints will support and check for duplicate endpoints.
3178 spin_lock_irqsave(&xhci->lock, flags);
3179 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3180 num_eps, &num_streams, &changed_ep_bitmask);
3182 xhci_free_command(xhci, config_cmd);
3183 spin_unlock_irqrestore(&xhci->lock, flags);
3186 if (num_streams <= 1) {
3187 xhci_warn(xhci, "WARN: endpoints can't handle "
3188 "more than one stream.\n");
3189 xhci_free_command(xhci, config_cmd);
3190 spin_unlock_irqrestore(&xhci->lock, flags);
3193 vdev = xhci->devs[udev->slot_id];
3194 /* Mark each endpoint as being in transition, so
3195 * xhci_urb_enqueue() will reject all URBs.
3197 for (i = 0; i < num_eps; i++) {
3198 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3199 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3201 spin_unlock_irqrestore(&xhci->lock, flags);
3203 /* Setup internal data structures and allocate HW data structures for
3204 * streams (but don't install the HW structures in the input context
3205 * until we're sure all memory allocation succeeded).
3207 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3208 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3209 num_stream_ctxs, num_streams);
3211 for (i = 0; i < num_eps; i++) {
3212 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3213 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3215 num_streams, mem_flags);
3216 if (!vdev->eps[ep_index].stream_info)
3218 /* Set maxPstreams in endpoint context and update deq ptr to
3219 * point to stream context array. FIXME
3223 /* Set up the input context for a configure endpoint command. */
3224 for (i = 0; i < num_eps; i++) {
3225 struct xhci_ep_ctx *ep_ctx;
3227 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3228 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3230 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3231 vdev->out_ctx, ep_index);
3232 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3233 vdev->eps[ep_index].stream_info);
3235 /* Tell the HW to drop its old copy of the endpoint context info
3236 * and add the updated copy from the input context.
3238 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3239 vdev->out_ctx, ctrl_ctx,
3240 changed_ep_bitmask, changed_ep_bitmask);
3242 /* Issue and wait for the configure endpoint command */
3243 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3246 /* xHC rejected the configure endpoint command for some reason, so we
3247 * leave the old ring intact and free our internal streams data
3253 spin_lock_irqsave(&xhci->lock, flags);
3254 for (i = 0; i < num_eps; i++) {
3255 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3256 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3257 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3258 udev->slot_id, ep_index);
3259 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3261 xhci_free_command(xhci, config_cmd);
3262 spin_unlock_irqrestore(&xhci->lock, flags);
3264 /* Subtract 1 for stream 0, which drivers can't use */
3265 return num_streams - 1;
3268 /* If it didn't work, free the streams! */
3269 for (i = 0; i < num_eps; i++) {
3270 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3271 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3272 vdev->eps[ep_index].stream_info = NULL;
3273 /* FIXME Unset maxPstreams in endpoint context and
3274 * update deq ptr to point to normal string ring.
3276 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3277 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3278 xhci_endpoint_zero(xhci, vdev, eps[i]);
3280 xhci_free_command(xhci, config_cmd);
3284 /* Transition the endpoint from using streams to being a "normal" endpoint
3287 * Modify the endpoint context state, submit a configure endpoint command,
3288 * and free all endpoint rings for streams if that completes successfully.
3290 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3291 struct usb_host_endpoint **eps, unsigned int num_eps,
3295 struct xhci_hcd *xhci;
3296 struct xhci_virt_device *vdev;
3297 struct xhci_command *command;
3298 struct xhci_input_control_ctx *ctrl_ctx;
3299 unsigned int ep_index;
3300 unsigned long flags;
3301 u32 changed_ep_bitmask;
3303 xhci = hcd_to_xhci(hcd);
3304 vdev = xhci->devs[udev->slot_id];
3306 /* Set up a configure endpoint command to remove the streams rings */
3307 spin_lock_irqsave(&xhci->lock, flags);
3308 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3309 udev, eps, num_eps);
3310 if (changed_ep_bitmask == 0) {
3311 spin_unlock_irqrestore(&xhci->lock, flags);
3315 /* Use the xhci_command structure from the first endpoint. We may have
3316 * allocated too many, but the driver may call xhci_free_streams() for
3317 * each endpoint it grouped into one call to xhci_alloc_streams().
3319 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3320 command = vdev->eps[ep_index].stream_info->free_streams_command;
3321 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3323 spin_unlock_irqrestore(&xhci->lock, flags);
3324 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3329 for (i = 0; i < num_eps; i++) {
3330 struct xhci_ep_ctx *ep_ctx;
3332 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3333 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3334 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3335 EP_GETTING_NO_STREAMS;
3337 xhci_endpoint_copy(xhci, command->in_ctx,
3338 vdev->out_ctx, ep_index);
3339 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3340 &vdev->eps[ep_index]);
3342 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3343 vdev->out_ctx, ctrl_ctx,
3344 changed_ep_bitmask, changed_ep_bitmask);
3345 spin_unlock_irqrestore(&xhci->lock, flags);
3347 /* Issue and wait for the configure endpoint command,
3348 * which must succeed.
3350 ret = xhci_configure_endpoint(xhci, udev, command,
3353 /* xHC rejected the configure endpoint command for some reason, so we
3354 * leave the streams rings intact.
3359 spin_lock_irqsave(&xhci->lock, flags);
3360 for (i = 0; i < num_eps; i++) {
3361 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3362 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3363 vdev->eps[ep_index].stream_info = NULL;
3364 /* FIXME Unset maxPstreams in endpoint context and
3365 * update deq ptr to point to normal string ring.
3367 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3368 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3370 spin_unlock_irqrestore(&xhci->lock, flags);
3376 * Deletes endpoint resources for endpoints that were active before a Reset
3377 * Device command, or a Disable Slot command. The Reset Device command leaves
3378 * the control endpoint intact, whereas the Disable Slot command deletes it.
3380 * Must be called with xhci->lock held.
3382 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3383 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3386 unsigned int num_dropped_eps = 0;
3387 unsigned int drop_flags = 0;
3389 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3390 if (virt_dev->eps[i].ring) {
3391 drop_flags |= 1 << i;
3395 xhci->num_active_eps -= num_dropped_eps;
3396 if (num_dropped_eps)
3397 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3398 "Dropped %u ep ctxs, flags = 0x%x, "
3400 num_dropped_eps, drop_flags,
3401 xhci->num_active_eps);
3405 * This submits a Reset Device Command, which will set the device state to 0,
3406 * set the device address to 0, and disable all the endpoints except the default
3407 * control endpoint. The USB core should come back and call
3408 * xhci_address_device(), and then re-set up the configuration. If this is
3409 * called because of a usb_reset_and_verify_device(), then the old alternate
3410 * settings will be re-installed through the normal bandwidth allocation
3413 * Wait for the Reset Device command to finish. Remove all structures
3414 * associated with the endpoints that were disabled. Clear the input device
3415 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3417 * If the virt_dev to be reset does not exist or does not match the udev,
3418 * it means the device is lost, possibly due to the xHC restore error and
3419 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3420 * re-allocate the device.
3422 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3425 unsigned long flags;
3426 struct xhci_hcd *xhci;
3427 unsigned int slot_id;
3428 struct xhci_virt_device *virt_dev;
3429 struct xhci_command *reset_device_cmd;
3430 int last_freed_endpoint;
3431 struct xhci_slot_ctx *slot_ctx;
3432 int old_active_eps = 0;
3434 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3437 xhci = hcd_to_xhci(hcd);
3438 slot_id = udev->slot_id;
3439 virt_dev = xhci->devs[slot_id];
3441 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3442 "not exist. Re-allocate the device\n", slot_id);
3443 ret = xhci_alloc_dev(hcd, udev);
3450 if (virt_dev->udev != udev) {
3451 /* If the virt_dev and the udev does not match, this virt_dev
3452 * may belong to another udev.
3453 * Re-allocate the device.
3455 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3456 "not match the udev. Re-allocate the device\n",
3458 ret = xhci_alloc_dev(hcd, udev);
3465 /* If device is not setup, there is no point in resetting it */
3466 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3467 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3468 SLOT_STATE_DISABLED)
3471 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3472 /* Allocate the command structure that holds the struct completion.
3473 * Assume we're in process context, since the normal device reset
3474 * process has to wait for the device anyway. Storage devices are
3475 * reset as part of error handling, so use GFP_NOIO instead of
3478 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3479 if (!reset_device_cmd) {
3480 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3484 /* Attempt to submit the Reset Device command to the command ring */
3485 spin_lock_irqsave(&xhci->lock, flags);
3487 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3489 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3490 spin_unlock_irqrestore(&xhci->lock, flags);
3491 goto command_cleanup;
3493 xhci_ring_cmd_db(xhci);
3494 spin_unlock_irqrestore(&xhci->lock, flags);
3496 /* Wait for the Reset Device command to finish */
3497 wait_for_completion(reset_device_cmd->completion);
3499 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3500 * unless we tried to reset a slot ID that wasn't enabled,
3501 * or the device wasn't in the addressed or configured state.
3503 ret = reset_device_cmd->status;
3505 case COMP_CMD_ABORT:
3507 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3509 goto command_cleanup;
3510 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3511 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3512 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3514 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3515 xhci_dbg(xhci, "Not freeing device rings.\n");
3516 /* Don't treat this as an error. May change my mind later. */
3518 goto command_cleanup;
3520 xhci_dbg(xhci, "Successful reset device command.\n");
3523 if (xhci_is_vendor_info_code(xhci, ret))
3525 xhci_warn(xhci, "Unknown completion code %u for "
3526 "reset device command.\n", ret);
3528 goto command_cleanup;
3531 /* Free up host controller endpoint resources */
3532 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3533 spin_lock_irqsave(&xhci->lock, flags);
3534 /* Don't delete the default control endpoint resources */
3535 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3536 spin_unlock_irqrestore(&xhci->lock, flags);
3539 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3540 last_freed_endpoint = 1;
3541 for (i = 1; i < 31; ++i) {
3542 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3544 if (ep->ep_state & EP_HAS_STREAMS) {
3545 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3546 xhci_get_endpoint_address(i));
3547 xhci_free_stream_info(xhci, ep->stream_info);
3548 ep->stream_info = NULL;
3549 ep->ep_state &= ~EP_HAS_STREAMS;
3553 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3554 last_freed_endpoint = i;
3556 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3557 xhci_drop_ep_from_interval_table(xhci,
3558 &virt_dev->eps[i].bw_info,
3563 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3565 /* If necessary, update the number of active TTs on this root port */
3566 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3568 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3569 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3573 xhci_free_command(xhci, reset_device_cmd);
3578 * At this point, the struct usb_device is about to go away, the device has
3579 * disconnected, and all traffic has been stopped and the endpoints have been
3580 * disabled. Free any HC data structures associated with that device.
3582 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3584 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3585 struct xhci_virt_device *virt_dev;
3586 unsigned long flags;
3589 struct xhci_command *command;
3591 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3595 #ifndef CONFIG_USB_DEFAULT_PERSIST
3597 * We called pm_runtime_get_noresume when the device was attached.
3598 * Decrement the counter here to allow controller to runtime suspend
3599 * if no devices remain.
3601 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3602 pm_runtime_put_noidle(hcd->self.controller);
3605 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3606 /* If the host is halted due to driver unload, we still need to free the
3609 if (ret <= 0 && ret != -ENODEV) {
3614 virt_dev = xhci->devs[udev->slot_id];
3616 /* Stop any wayward timer functions (which may grab the lock) */
3617 for (i = 0; i < 31; ++i) {
3618 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3619 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3622 spin_lock_irqsave(&xhci->lock, flags);
3623 /* Don't disable the slot if the host controller is dead. */
3624 state = readl(&xhci->op_regs->status);
3625 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3626 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3627 xhci_free_virt_device(xhci, udev->slot_id);
3628 spin_unlock_irqrestore(&xhci->lock, flags);
3633 if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3635 spin_unlock_irqrestore(&xhci->lock, flags);
3636 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3639 xhci_ring_cmd_db(xhci);
3640 spin_unlock_irqrestore(&xhci->lock, flags);
3643 * Event command completion handler will free any data structures
3644 * associated with the slot. XXX Can free sleep?
3649 * Checks if we have enough host controller resources for the default control
3652 * Must be called with xhci->lock held.
3654 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3656 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3657 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3658 "Not enough ep ctxs: "
3659 "%u active, need to add 1, limit is %u.",
3660 xhci->num_active_eps, xhci->limit_active_eps);
3663 xhci->num_active_eps += 1;
3664 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3665 "Adding 1 ep ctx, %u now active.",
3666 xhci->num_active_eps);
3672 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3673 * timed out, or allocating memory failed. Returns 1 on success.
3675 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3677 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3678 unsigned long flags;
3680 struct xhci_command *command;
3682 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3686 spin_lock_irqsave(&xhci->lock, flags);
3687 command->completion = &xhci->addr_dev;
3688 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3690 spin_unlock_irqrestore(&xhci->lock, flags);
3691 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3695 xhci_ring_cmd_db(xhci);
3696 spin_unlock_irqrestore(&xhci->lock, flags);
3698 wait_for_completion(command->completion);
3700 if (!xhci->slot_id || command->status != COMP_SUCCESS) {
3701 xhci_err(xhci, "Error while assigning device slot ID\n");
3702 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3704 readl(&xhci->cap_regs->hcs_params1)));
3709 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3710 spin_lock_irqsave(&xhci->lock, flags);
3711 ret = xhci_reserve_host_control_ep_resources(xhci);
3713 spin_unlock_irqrestore(&xhci->lock, flags);
3714 xhci_warn(xhci, "Not enough host resources, "
3715 "active endpoint contexts = %u\n",
3716 xhci->num_active_eps);
3719 spin_unlock_irqrestore(&xhci->lock, flags);
3721 /* Use GFP_NOIO, since this function can be called from
3722 * xhci_discover_or_reset_device(), which may be called as part of
3723 * mass storage driver error handling.
3725 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3726 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3729 udev->slot_id = xhci->slot_id;
3731 #ifndef CONFIG_USB_DEFAULT_PERSIST
3733 * If resetting upon resume, we can't put the controller into runtime
3734 * suspend if there is a device attached.
3736 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3737 pm_runtime_get_noresume(hcd->self.controller);
3742 /* Is this a LS or FS device under a HS hub? */
3743 /* Hub or peripherial? */
3747 /* Disable slot, if we can do it without mem alloc */
3748 spin_lock_irqsave(&xhci->lock, flags);
3749 command->completion = NULL;
3750 command->status = 0;
3751 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3753 xhci_ring_cmd_db(xhci);
3754 spin_unlock_irqrestore(&xhci->lock, flags);
3759 * Issue an Address Device command and optionally send a corresponding
3760 * SetAddress request to the device.
3761 * We should be protected by the usb_address0_mutex in hub_wq's hub_port_init,
3762 * so we should only issue and wait on one address command at the same time.
3764 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3765 enum xhci_setup_dev setup)
3767 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3768 unsigned long flags;
3769 struct xhci_virt_device *virt_dev;
3771 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3772 struct xhci_slot_ctx *slot_ctx;
3773 struct xhci_input_control_ctx *ctrl_ctx;
3775 struct xhci_command *command;
3777 if (!udev->slot_id) {
3778 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3779 "Bad Slot ID %d", udev->slot_id);
3783 virt_dev = xhci->devs[udev->slot_id];
3785 if (WARN_ON(!virt_dev)) {
3787 * In plug/unplug torture test with an NEC controller,
3788 * a zero-dereference was observed once due to virt_dev = 0.
3789 * Print useful debug rather than crash if it is observed again!
3791 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3796 if (setup == SETUP_CONTEXT_ONLY) {
3797 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3798 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3799 SLOT_STATE_DEFAULT) {
3800 xhci_dbg(xhci, "Slot already in default state\n");
3805 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3809 command->in_ctx = virt_dev->in_ctx;
3810 command->completion = &xhci->addr_dev;
3812 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3813 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
3815 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3821 * If this is the first Set Address since device plug-in or
3822 * virt_device realloaction after a resume with an xHCI power loss,
3823 * then set up the slot context.
3825 if (!slot_ctx->dev_info)
3826 xhci_setup_addressable_virt_dev(xhci, udev);
3827 /* Otherwise, update the control endpoint ring enqueue pointer. */
3829 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3830 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3831 ctrl_ctx->drop_flags = 0;
3833 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3834 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3835 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3836 le32_to_cpu(slot_ctx->dev_info) >> 27);
3838 spin_lock_irqsave(&xhci->lock, flags);
3839 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3840 udev->slot_id, setup);
3842 spin_unlock_irqrestore(&xhci->lock, flags);
3843 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3844 "FIXME: allocate a command ring segment");
3848 xhci_ring_cmd_db(xhci);
3849 spin_unlock_irqrestore(&xhci->lock, flags);
3851 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3852 wait_for_completion(command->completion);
3854 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3855 * the SetAddress() "recovery interval" required by USB and aborting the
3856 * command on a timeout.
3858 switch (command->status) {
3859 case COMP_CMD_ABORT:
3861 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3864 case COMP_CTX_STATE:
3866 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3867 act, udev->slot_id);
3871 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3875 dev_warn(&udev->dev,
3876 "ERROR: Incompatible device for setup %s command\n", act);
3880 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3881 "Successful setup %s command", act);
3885 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3886 act, command->status);
3887 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3888 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3889 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3897 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3898 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3899 "Op regs DCBAA ptr = %#016llx", temp_64);
3900 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3901 "Slot ID %d dcbaa entry @%p = %#016llx",
3903 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3904 (unsigned long long)
3905 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3906 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3907 "Output Context DMA address = %#08llx",
3908 (unsigned long long)virt_dev->out_ctx->dma);
3909 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3910 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3911 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3912 le32_to_cpu(slot_ctx->dev_info) >> 27);
3913 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3914 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3916 * USB core uses address 1 for the roothubs, so we add one to the
3917 * address given back to us by the HC.
3919 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3920 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3921 le32_to_cpu(slot_ctx->dev_info) >> 27);
3922 /* Zero the input context control for later use */
3923 ctrl_ctx->add_flags = 0;
3924 ctrl_ctx->drop_flags = 0;
3926 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3927 "Internal device address = %d",
3928 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3933 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3935 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3938 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3940 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3944 * Transfer the port index into real index in the HW port status
3945 * registers. Caculate offset between the port's PORTSC register
3946 * and port status base. Divide the number of per port register
3947 * to get the real index. The raw port number bases 1.
3949 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3951 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3952 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3953 __le32 __iomem *addr;
3956 if (hcd->speed != HCD_USB3)
3957 addr = xhci->usb2_ports[port1 - 1];
3959 addr = xhci->usb3_ports[port1 - 1];
3961 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3966 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3967 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3969 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3970 struct usb_device *udev, u16 max_exit_latency)
3972 struct xhci_virt_device *virt_dev;
3973 struct xhci_command *command;
3974 struct xhci_input_control_ctx *ctrl_ctx;
3975 struct xhci_slot_ctx *slot_ctx;
3976 unsigned long flags;
3979 spin_lock_irqsave(&xhci->lock, flags);
3981 virt_dev = xhci->devs[udev->slot_id];
3984 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3985 * xHC was re-initialized. Exit latency will be set later after
3986 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3989 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
3990 spin_unlock_irqrestore(&xhci->lock, flags);
3994 /* Attempt to issue an Evaluate Context command to change the MEL. */
3995 command = xhci->lpm_command;
3996 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3998 spin_unlock_irqrestore(&xhci->lock, flags);
3999 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4004 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4005 spin_unlock_irqrestore(&xhci->lock, flags);
4007 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4008 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4009 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4010 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4011 slot_ctx->dev_state = 0;
4013 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4014 "Set up evaluate context for LPM MEL change.");
4015 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4016 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4018 /* Issue and wait for the evaluate context command. */
4019 ret = xhci_configure_endpoint(xhci, udev, command,
4021 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4022 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4025 spin_lock_irqsave(&xhci->lock, flags);
4026 virt_dev->current_mel = max_exit_latency;
4027 spin_unlock_irqrestore(&xhci->lock, flags);
4034 /* BESL to HIRD Encoding array for USB2 LPM */
4035 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4036 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4038 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4039 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4040 struct usb_device *udev)
4042 int u2del, besl, besl_host;
4043 int besl_device = 0;
4046 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4047 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4049 if (field & USB_BESL_SUPPORT) {
4050 for (besl_host = 0; besl_host < 16; besl_host++) {
4051 if (xhci_besl_encoding[besl_host] >= u2del)
4054 /* Use baseline BESL value as default */
4055 if (field & USB_BESL_BASELINE_VALID)
4056 besl_device = USB_GET_BESL_BASELINE(field);
4057 else if (field & USB_BESL_DEEP_VALID)
4058 besl_device = USB_GET_BESL_DEEP(field);
4063 besl_host = (u2del - 51) / 75 + 1;
4066 besl = besl_host + besl_device;
4073 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4074 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4081 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4083 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4084 l1 = udev->l1_params.timeout / 256;
4086 /* device has preferred BESLD */
4087 if (field & USB_BESL_DEEP_VALID) {
4088 besld = USB_GET_BESL_DEEP(field);
4092 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4095 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4096 struct usb_device *udev, int enable)
4098 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4099 __le32 __iomem **port_array;
4100 __le32 __iomem *pm_addr, *hlpm_addr;
4101 u32 pm_val, hlpm_val, field;
4102 unsigned int port_num;
4103 unsigned long flags;
4104 int hird, exit_latency;
4107 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4111 if (!udev->parent || udev->parent->parent ||
4112 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4115 if (udev->usb2_hw_lpm_capable != 1)
4118 spin_lock_irqsave(&xhci->lock, flags);
4120 port_array = xhci->usb2_ports;
4121 port_num = udev->portnum - 1;
4122 pm_addr = port_array[port_num] + PORTPMSC;
4123 pm_val = readl(pm_addr);
4124 hlpm_addr = port_array[port_num] + PORTHLPMC;
4125 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4127 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4128 enable ? "enable" : "disable", port_num + 1);
4131 /* Host supports BESL timeout instead of HIRD */
4132 if (udev->usb2_hw_lpm_besl_capable) {
4133 /* if device doesn't have a preferred BESL value use a
4134 * default one which works with mixed HIRD and BESL
4135 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4137 if ((field & USB_BESL_SUPPORT) &&
4138 (field & USB_BESL_BASELINE_VALID))
4139 hird = USB_GET_BESL_BASELINE(field);
4141 hird = udev->l1_params.besl;
4143 exit_latency = xhci_besl_encoding[hird];
4144 spin_unlock_irqrestore(&xhci->lock, flags);
4146 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4147 * input context for link powermanagement evaluate
4148 * context commands. It is protected by hcd->bandwidth
4149 * mutex and is shared by all devices. We need to set
4150 * the max ext latency in USB 2 BESL LPM as well, so
4151 * use the same mutex and xhci_change_max_exit_latency()
4153 mutex_lock(hcd->bandwidth_mutex);
4154 ret = xhci_change_max_exit_latency(xhci, udev,
4156 mutex_unlock(hcd->bandwidth_mutex);
4160 spin_lock_irqsave(&xhci->lock, flags);
4162 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4163 writel(hlpm_val, hlpm_addr);
4167 hird = xhci_calculate_hird_besl(xhci, udev);
4170 pm_val &= ~PORT_HIRD_MASK;
4171 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4172 writel(pm_val, pm_addr);
4173 pm_val = readl(pm_addr);
4175 writel(pm_val, pm_addr);
4179 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4180 writel(pm_val, pm_addr);
4183 if (udev->usb2_hw_lpm_besl_capable) {
4184 spin_unlock_irqrestore(&xhci->lock, flags);
4185 mutex_lock(hcd->bandwidth_mutex);
4186 xhci_change_max_exit_latency(xhci, udev, 0);
4187 mutex_unlock(hcd->bandwidth_mutex);
4192 spin_unlock_irqrestore(&xhci->lock, flags);
4196 /* check if a usb2 port supports a given extened capability protocol
4197 * only USB2 ports extended protocol capability values are cached.
4198 * Return 1 if capability is supported
4200 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4201 unsigned capability)
4203 u32 port_offset, port_count;
4206 for (i = 0; i < xhci->num_ext_caps; i++) {
4207 if (xhci->ext_caps[i] & capability) {
4208 /* port offsets starts at 1 */
4209 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4210 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4211 if (port >= port_offset &&
4212 port < port_offset + port_count)
4219 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4221 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4222 int portnum = udev->portnum - 1;
4224 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4228 /* we only support lpm for non-hub device connected to root hub yet */
4229 if (!udev->parent || udev->parent->parent ||
4230 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4233 if (xhci->hw_lpm_support == 1 &&
4234 xhci_check_usb2_port_capability(
4235 xhci, portnum, XHCI_HLC)) {
4236 udev->usb2_hw_lpm_capable = 1;
4237 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4238 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4239 if (xhci_check_usb2_port_capability(xhci, portnum,
4241 udev->usb2_hw_lpm_besl_capable = 1;
4247 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4249 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4250 static unsigned long long xhci_service_interval_to_ns(
4251 struct usb_endpoint_descriptor *desc)
4253 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4256 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4257 enum usb3_link_state state)
4259 unsigned long long sel;
4260 unsigned long long pel;
4261 unsigned int max_sel_pel;
4266 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4267 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4268 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4269 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4273 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4274 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4275 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4279 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4281 return USB3_LPM_DISABLED;
4284 if (sel <= max_sel_pel && pel <= max_sel_pel)
4285 return USB3_LPM_DEVICE_INITIATED;
4287 if (sel > max_sel_pel)
4288 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4289 "due to long SEL %llu ms\n",
4292 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4293 "due to long PEL %llu ms\n",
4295 return USB3_LPM_DISABLED;
4298 /* The U1 timeout should be the maximum of the following values:
4299 * - For control endpoints, U1 system exit latency (SEL) * 3
4300 * - For bulk endpoints, U1 SEL * 5
4301 * - For interrupt endpoints:
4302 * - Notification EPs, U1 SEL * 3
4303 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4304 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4306 static unsigned long long xhci_calculate_intel_u1_timeout(
4307 struct usb_device *udev,
4308 struct usb_endpoint_descriptor *desc)
4310 unsigned long long timeout_ns;
4314 ep_type = usb_endpoint_type(desc);
4316 case USB_ENDPOINT_XFER_CONTROL:
4317 timeout_ns = udev->u1_params.sel * 3;
4319 case USB_ENDPOINT_XFER_BULK:
4320 timeout_ns = udev->u1_params.sel * 5;
4322 case USB_ENDPOINT_XFER_INT:
4323 intr_type = usb_endpoint_interrupt_type(desc);
4324 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4325 timeout_ns = udev->u1_params.sel * 3;
4328 /* Otherwise the calculation is the same as isoc eps */
4329 case USB_ENDPOINT_XFER_ISOC:
4330 timeout_ns = xhci_service_interval_to_ns(desc);
4331 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4332 if (timeout_ns < udev->u1_params.sel * 2)
4333 timeout_ns = udev->u1_params.sel * 2;
4342 /* Returns the hub-encoded U1 timeout value. */
4343 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4344 struct usb_device *udev,
4345 struct usb_endpoint_descriptor *desc)
4347 unsigned long long timeout_ns;
4349 if (xhci->quirks & XHCI_INTEL_HOST)
4350 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4352 timeout_ns = udev->u1_params.sel;
4354 /* The U1 timeout is encoded in 1us intervals.
4355 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4357 if (timeout_ns == USB3_LPM_DISABLED)
4360 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4362 /* If the necessary timeout value is bigger than what we can set in the
4363 * USB 3.0 hub, we have to disable hub-initiated U1.
4365 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4367 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4368 "due to long timeout %llu ms\n", timeout_ns);
4369 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4372 /* The U2 timeout should be the maximum of:
4373 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4374 * - largest bInterval of any active periodic endpoint (to avoid going
4375 * into lower power link states between intervals).
4376 * - the U2 Exit Latency of the device
4378 static unsigned long long xhci_calculate_intel_u2_timeout(
4379 struct usb_device *udev,
4380 struct usb_endpoint_descriptor *desc)
4382 unsigned long long timeout_ns;
4383 unsigned long long u2_del_ns;
4385 timeout_ns = 10 * 1000 * 1000;
4387 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4388 (xhci_service_interval_to_ns(desc) > timeout_ns))
4389 timeout_ns = xhci_service_interval_to_ns(desc);
4391 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4392 if (u2_del_ns > timeout_ns)
4393 timeout_ns = u2_del_ns;
4398 /* Returns the hub-encoded U2 timeout value. */
4399 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4400 struct usb_device *udev,
4401 struct usb_endpoint_descriptor *desc)
4403 unsigned long long timeout_ns;
4405 if (xhci->quirks & XHCI_INTEL_HOST)
4406 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4408 timeout_ns = udev->u2_params.sel;
4410 /* The U2 timeout is encoded in 256us intervals */
4411 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4412 /* If the necessary timeout value is bigger than what we can set in the
4413 * USB 3.0 hub, we have to disable hub-initiated U2.
4415 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4417 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4418 "due to long timeout %llu ms\n", timeout_ns);
4419 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4422 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4423 struct usb_device *udev,
4424 struct usb_endpoint_descriptor *desc,
4425 enum usb3_link_state state,
4428 if (state == USB3_LPM_U1)
4429 return xhci_calculate_u1_timeout(xhci, udev, desc);
4430 else if (state == USB3_LPM_U2)
4431 return xhci_calculate_u2_timeout(xhci, udev, desc);
4433 return USB3_LPM_DISABLED;
4436 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4437 struct usb_device *udev,
4438 struct usb_endpoint_descriptor *desc,
4439 enum usb3_link_state state,
4444 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4445 desc, state, timeout);
4447 /* If we found we can't enable hub-initiated LPM, or
4448 * the U1 or U2 exit latency was too high to allow
4449 * device-initiated LPM as well, just stop searching.
4451 if (alt_timeout == USB3_LPM_DISABLED ||
4452 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4453 *timeout = alt_timeout;
4456 if (alt_timeout > *timeout)
4457 *timeout = alt_timeout;
4461 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4462 struct usb_device *udev,
4463 struct usb_host_interface *alt,
4464 enum usb3_link_state state,
4469 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4470 if (xhci_update_timeout_for_endpoint(xhci, udev,
4471 &alt->endpoint[j].desc, state, timeout))
4478 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4479 enum usb3_link_state state)
4481 struct usb_device *parent;
4482 unsigned int num_hubs;
4484 if (state == USB3_LPM_U2)
4487 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4488 for (parent = udev->parent, num_hubs = 0; parent->parent;
4489 parent = parent->parent)
4495 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4496 " below second-tier hub.\n");
4497 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4498 "to decrease power consumption.\n");
4502 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4503 struct usb_device *udev,
4504 enum usb3_link_state state)
4506 if (xhci->quirks & XHCI_INTEL_HOST)
4507 return xhci_check_intel_tier_policy(udev, state);
4512 /* Returns the U1 or U2 timeout that should be enabled.
4513 * If the tier check or timeout setting functions return with a non-zero exit
4514 * code, that means the timeout value has been finalized and we shouldn't look
4515 * at any more endpoints.
4517 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4518 struct usb_device *udev, enum usb3_link_state state)
4520 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4521 struct usb_host_config *config;
4524 u16 timeout = USB3_LPM_DISABLED;
4526 if (state == USB3_LPM_U1)
4528 else if (state == USB3_LPM_U2)
4531 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4536 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4539 /* Gather some information about the currently installed configuration
4540 * and alternate interface settings.
4542 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4546 config = udev->actconfig;
4550 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4551 struct usb_driver *driver;
4552 struct usb_interface *intf = config->interface[i];
4557 /* Check if any currently bound drivers want hub-initiated LPM
4560 if (intf->dev.driver) {
4561 driver = to_usb_driver(intf->dev.driver);
4562 if (driver && driver->disable_hub_initiated_lpm) {
4563 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4564 "at request of driver %s\n",
4565 state_name, driver->name);
4566 return xhci_get_timeout_no_hub_lpm(udev, state);
4570 /* Not sure how this could happen... */
4571 if (!intf->cur_altsetting)
4574 if (xhci_update_timeout_for_interface(xhci, udev,
4575 intf->cur_altsetting,
4582 static int calculate_max_exit_latency(struct usb_device *udev,
4583 enum usb3_link_state state_changed,
4584 u16 hub_encoded_timeout)
4586 unsigned long long u1_mel_us = 0;
4587 unsigned long long u2_mel_us = 0;
4588 unsigned long long mel_us = 0;
4594 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4595 hub_encoded_timeout == USB3_LPM_DISABLED);
4596 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4597 hub_encoded_timeout == USB3_LPM_DISABLED);
4599 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4600 hub_encoded_timeout != USB3_LPM_DISABLED);
4601 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4602 hub_encoded_timeout != USB3_LPM_DISABLED);
4604 /* If U1 was already enabled and we're not disabling it,
4605 * or we're going to enable U1, account for the U1 max exit latency.
4607 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4609 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4610 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4612 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4614 if (u1_mel_us > u2_mel_us)
4618 /* xHCI host controller max exit latency field is only 16 bits wide. */
4619 if (mel_us > MAX_EXIT) {
4620 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4621 "is too big.\n", mel_us);
4627 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4628 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4629 struct usb_device *udev, enum usb3_link_state state)
4631 struct xhci_hcd *xhci;
4632 u16 hub_encoded_timeout;
4636 xhci = hcd_to_xhci(hcd);
4637 /* The LPM timeout values are pretty host-controller specific, so don't
4638 * enable hub-initiated timeouts unless the vendor has provided
4639 * information about their timeout algorithm.
4641 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4642 !xhci->devs[udev->slot_id])
4643 return USB3_LPM_DISABLED;
4645 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4646 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4648 /* Max Exit Latency is too big, disable LPM. */
4649 hub_encoded_timeout = USB3_LPM_DISABLED;
4653 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4656 return hub_encoded_timeout;
4659 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4660 struct usb_device *udev, enum usb3_link_state state)
4662 struct xhci_hcd *xhci;
4666 xhci = hcd_to_xhci(hcd);
4667 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4668 !xhci->devs[udev->slot_id])
4671 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4672 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4677 #else /* CONFIG_PM */
4679 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4680 struct usb_device *udev, int enable)
4685 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4690 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4691 struct usb_device *udev, enum usb3_link_state state)
4693 return USB3_LPM_DISABLED;
4696 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4697 struct usb_device *udev, enum usb3_link_state state)
4701 #endif /* CONFIG_PM */
4703 /*-------------------------------------------------------------------------*/
4705 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4706 * internal data structures for the device.
4708 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4709 struct usb_tt *tt, gfp_t mem_flags)
4711 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4712 struct xhci_virt_device *vdev;
4713 struct xhci_command *config_cmd;
4714 struct xhci_input_control_ctx *ctrl_ctx;
4715 struct xhci_slot_ctx *slot_ctx;
4716 unsigned long flags;
4717 unsigned think_time;
4720 /* Ignore root hubs */
4724 vdev = xhci->devs[hdev->slot_id];
4726 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4729 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4731 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4734 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
4736 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4738 xhci_free_command(xhci, config_cmd);
4742 spin_lock_irqsave(&xhci->lock, flags);
4743 if (hdev->speed == USB_SPEED_HIGH &&
4744 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4745 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4746 xhci_free_command(xhci, config_cmd);
4747 spin_unlock_irqrestore(&xhci->lock, flags);
4751 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4752 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4753 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4754 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4756 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4757 if (xhci->hci_version > 0x95) {
4758 xhci_dbg(xhci, "xHCI version %x needs hub "
4759 "TT think time and number of ports\n",
4760 (unsigned int) xhci->hci_version);
4761 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4762 /* Set TT think time - convert from ns to FS bit times.
4763 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4764 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4766 * xHCI 1.0: this field shall be 0 if the device is not a
4769 think_time = tt->think_time;
4770 if (think_time != 0)
4771 think_time = (think_time / 666) - 1;
4772 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4773 slot_ctx->tt_info |=
4774 cpu_to_le32(TT_THINK_TIME(think_time));
4776 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4777 "TT think time or number of ports\n",
4778 (unsigned int) xhci->hci_version);
4780 slot_ctx->dev_state = 0;
4781 spin_unlock_irqrestore(&xhci->lock, flags);
4783 xhci_dbg(xhci, "Set up %s for hub device.\n",
4784 (xhci->hci_version > 0x95) ?
4785 "configure endpoint" : "evaluate context");
4786 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4787 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4789 /* Issue and wait for the configure endpoint or
4790 * evaluate context command.
4792 if (xhci->hci_version > 0x95)
4793 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4796 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4799 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4800 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4802 xhci_free_command(xhci, config_cmd);
4806 int xhci_get_frame(struct usb_hcd *hcd)
4808 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4809 /* EHCI mods by the periodic size. Why? */
4810 return readl(&xhci->run_regs->microframe_index) >> 3;
4813 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4815 struct xhci_hcd *xhci;
4816 struct device *dev = hcd->self.controller;
4819 /* Accept arbitrarily long scatter-gather lists */
4820 hcd->self.sg_tablesize = ~0;
4822 /* support to build packet from discontinuous buffers */
4823 hcd->self.no_sg_constraint = 1;
4825 /* XHCI controllers don't stop the ep queue on short packets :| */
4826 hcd->self.no_stop_on_short = 1;
4828 if (usb_hcd_is_primary_hcd(hcd)) {
4829 xhci = hcd_to_xhci(hcd);
4830 xhci->main_hcd = hcd;
4831 /* Mark the first roothub as being USB 2.0.
4832 * The xHCI driver will register the USB 3.0 roothub.
4834 hcd->speed = HCD_USB2;
4835 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4837 * USB 2.0 roothub under xHCI has an integrated TT,
4838 * (rate matching hub) as opposed to having an OHCI/UHCI
4839 * companion controller.
4843 /* xHCI private pointer was set in xhci_pci_probe for the second
4844 * registered roothub.
4849 xhci->cap_regs = hcd->regs;
4850 xhci->op_regs = hcd->regs +
4851 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4852 xhci->run_regs = hcd->regs +
4853 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4854 /* Cache read-only capability registers */
4855 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4856 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4857 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4858 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4859 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4860 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4861 xhci_print_registers(xhci);
4863 xhci->quirks = quirks;
4865 get_quirks(dev, xhci);
4867 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4868 * success event after a short transfer. This quirk will ignore such
4871 if (xhci->hci_version > 0x96)
4872 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4874 /* Make sure the HC is halted. */
4875 retval = xhci_halt(xhci);
4879 xhci_dbg(xhci, "Resetting HCD\n");
4880 /* Reset the internal HC memory state and registers. */
4881 retval = xhci_reset(xhci);
4884 xhci_dbg(xhci, "Reset complete\n");
4886 /* Set dma_mask and coherent_dma_mask to 64-bits,
4887 * if xHC supports 64-bit addressing */
4888 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4889 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4890 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4891 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4894 xhci_dbg(xhci, "Calling HCD init\n");
4895 /* Initialize HCD and host controller data structures. */
4896 retval = xhci_init(hcd);
4899 xhci_dbg(xhci, "Called HCD init\n");
4901 xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4902 xhci->hcc_params, xhci->hci_version, xhci->quirks);
4906 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4908 static const struct hc_driver xhci_hc_driver = {
4909 .description = "xhci-hcd",
4910 .product_desc = "xHCI Host Controller",
4911 .hcd_priv_size = sizeof(struct xhci_hcd *),
4914 * generic hardware linkage
4917 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4920 * basic lifecycle operations
4922 .reset = NULL, /* set in xhci_init_driver() */
4925 .shutdown = xhci_shutdown,
4928 * managing i/o requests and associated device resources
4930 .urb_enqueue = xhci_urb_enqueue,
4931 .urb_dequeue = xhci_urb_dequeue,
4932 .alloc_dev = xhci_alloc_dev,
4933 .free_dev = xhci_free_dev,
4934 .alloc_streams = xhci_alloc_streams,
4935 .free_streams = xhci_free_streams,
4936 .add_endpoint = xhci_add_endpoint,
4937 .drop_endpoint = xhci_drop_endpoint,
4938 .endpoint_reset = xhci_endpoint_reset,
4939 .check_bandwidth = xhci_check_bandwidth,
4940 .reset_bandwidth = xhci_reset_bandwidth,
4941 .address_device = xhci_address_device,
4942 .enable_device = xhci_enable_device,
4943 .update_hub_device = xhci_update_hub_device,
4944 .reset_device = xhci_discover_or_reset_device,
4947 * scheduling support
4949 .get_frame_number = xhci_get_frame,
4954 .hub_control = xhci_hub_control,
4955 .hub_status_data = xhci_hub_status_data,
4956 .bus_suspend = xhci_bus_suspend,
4957 .bus_resume = xhci_bus_resume,
4960 * call back when device connected and addressed
4962 .update_device = xhci_update_device,
4963 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4964 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4965 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
4966 .find_raw_port_number = xhci_find_raw_port_number,
4969 void xhci_init_driver(struct hc_driver *drv,
4970 const struct xhci_driver_overrides *over)
4974 /* Copy the generic table to drv then apply the overrides */
4975 *drv = xhci_hc_driver;
4978 drv->hcd_priv_size += over->extra_priv_size;
4980 drv->reset = over->reset;
4982 drv->start = over->start;
4985 EXPORT_SYMBOL_GPL(xhci_init_driver);
4987 MODULE_DESCRIPTION(DRIVER_DESC);
4988 MODULE_AUTHOR(DRIVER_AUTHOR);
4989 MODULE_LICENSE("GPL");
4991 static int __init xhci_hcd_init(void)
4994 * Check the compiler generated sizes of structures that must be laid
4995 * out in specific ways for hardware access.
4997 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4998 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4999 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
5000 /* xhci_device_control has eight fields, and also
5001 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5003 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
5004 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
5005 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
5006 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
5007 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5008 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5009 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5012 module_init(xhci_hcd_init);