video: exynos: dp: Check DPCD return codes
authorSean Paul <seanpaul@chromium.org>
Mon, 16 Jul 2012 22:12:06 +0000 (15:12 -0700)
committerGerrit <chrome-bot@google.com>
Tue, 17 Jul 2012 20:11:25 +0000 (13:11 -0700)
Add return code checks to the DPCD transactions in the SW link training.

BUG=chrome-os-partner:11325
TEST=Tested on snow

Change-Id: I94caca28f96af20ecb777739ad4e922a81f02796
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27576
Reviewed-by: Mandeep Singh Baines <msb@chromium.org>
drivers/video/exynos/exynos_dp_core.c

index 0e599a5..1999fcb 100644 (file)
@@ -258,8 +258,9 @@ static void exynos_dp_set_lane_lane_pre_emphasis(struct exynos_dp_device *dp,
        }
 }
 
-static void exynos_dp_link_start(struct exynos_dp_device *dp)
+static int exynos_dp_link_start(struct exynos_dp_device *dp)
 {
+       int ret;
        u8 buf[5];
        int lane;
        int lane_count;
@@ -273,8 +274,10 @@ static void exynos_dp_link_start(struct exynos_dp_device *dp)
                dp->link_train.cr_loop[lane] = 0;
 
        /* Set sink to D0 (Sink Not Ready) mode. */
-       exynos_dp_write_byte_to_dpcd(dp, DPCD_ADDR_SINK_POWER_STATE,
+       ret = exynos_dp_write_byte_to_dpcd(dp, DPCD_ADDR_SINK_POWER_STATE,
                                DPCD_SET_POWER_STATE_D0);
+       if (ret)
+               return ret;
 
        /* Set link rate and count as you want to establish*/
        exynos_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
@@ -283,8 +286,10 @@ static void exynos_dp_link_start(struct exynos_dp_device *dp)
        /* Setup RX configuration */
        buf[0] = dp->link_train.link_rate;
        buf[1] = dp->link_train.lane_count;
-       exynos_dp_write_bytes_to_dpcd(dp, DPCD_ADDR_LINK_BW_SET,
+       ret = exynos_dp_write_bytes_to_dpcd(dp, DPCD_ADDR_LINK_BW_SET,
                                2, buf);
+       if (ret)
+               return ret;
 
        /* Set TX pre-emphasis to minimum */
        for (lane = 0; lane < lane_count; lane++)
@@ -300,9 +305,13 @@ static void exynos_dp_link_start(struct exynos_dp_device *dp)
        for (lane = 1; lane <= lane_count; lane++)
                buf[lane] = DPCD_PRE_EMPHASIS_PATTERN2_LEVEL0 |
                            DPCD_VOLTAGE_SWING_PATTERN1_LEVEL0;
-       exynos_dp_write_bytes_to_dpcd(dp,
+       ret = exynos_dp_write_bytes_to_dpcd(dp,
                DPCD_ADDR_TRAINING_PATTERN_SET,
                lane_count + 1, buf);
+       if (ret)
+               return ret;
+
+       return ret;
 }
 
 static unsigned char exynos_dp_get_lane_status(u8 link_status[6], int lane)
@@ -469,6 +478,7 @@ static int exynos_dp_check_max_cr_loop(struct exynos_dp_device *dp,
 
 static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
 {
+       int ret;
        u8 data;
        u8 link_status[6];
        int lane;
@@ -482,8 +492,11 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
 
        udelay(100);
 
-       exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_LANE0_1_STATUS,
+       ret = exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_LANE0_1_STATUS,
                                6, link_status);
+       if (ret)
+               return ret;
+
        lane_count = dp->link_train.lane_count;
 
        adjust_request[0] = link_status[4];
@@ -497,18 +510,22 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
 
                buf[0] = DPCD_SCRAMBLING_DISABLED |
                         DPCD_TRAINING_PATTERN_2;
-               exynos_dp_write_byte_to_dpcd(dp,
+               ret = exynos_dp_write_byte_to_dpcd(dp,
                        DPCD_ADDR_TRAINING_PATTERN_SET,
                        buf[0]);
+               if (ret)
+                       return ret;
 
                for (lane = 0; lane < lane_count; lane++) {
                        exynos_dp_set_lane_link_training(dp,
                                dp->link_train.training_lane[lane],
                                lane);
                        buf[lane] = dp->link_train.training_lane[lane];
-                       exynos_dp_write_byte_to_dpcd(dp,
+                       ret = exynos_dp_write_byte_to_dpcd(dp,
                                DPCD_ADDR_TRAINING_LANE0_SET + lane,
                                buf[lane]);
+                       if (ret)
+                               return ret;
                }
                dp->link_train.lt_state = EQUALIZER_TRAINING;
        } else {
@@ -535,18 +552,21 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
                                        dp->link_train.training_lane[lane],
                                        lane);
                                buf[lane] = dp->link_train.training_lane[lane];
-                               exynos_dp_write_byte_to_dpcd(dp,
+                               ret = exynos_dp_write_byte_to_dpcd(dp,
                                        DPCD_ADDR_TRAINING_LANE0_SET + lane,
                                        buf[lane]);
+                               if (ret)
+                                       return ret;
                        }
                }
        }
 
-       return 0;
+       return ret;
 }
 
 static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
 {
+       int ret;
        u8 link_status[6];
        int lane;
        int lane_count;
@@ -557,8 +577,10 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
 
        udelay(400);
 
-       exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_LANE0_1_STATUS,
+       ret = exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_LANE0_1_STATUS,
                                6, link_status);
+       if (ret)
+               return ret;
        lane_count = dp->link_train.lane_count;
 
        if (exynos_dp_clock_recovery_ok(link_status, lane_count) == 0) {
@@ -598,9 +620,11 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
                                                dp->link_train.training_lane[lane],
                                                lane);
                                        buf[lane] = dp->link_train.training_lane[lane];
-                                       exynos_dp_write_byte_to_dpcd(dp,
+                                       ret = exynos_dp_write_byte_to_dpcd(dp,
                                                DPCD_ADDR_TRAINING_LANE0_SET + lane,
                                                buf[lane]);
+                                       if (ret)
+                                               return ret;
                                }
                        }
                }
@@ -608,7 +632,7 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
                exynos_dp_reduce_link_rate(dp);
        }
 
-       return 0;
+       return ret;
 }
 
 static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
@@ -676,8 +700,7 @@ static void exynos_dp_init_training(struct exynos_dp_device *dp,
 
 static int exynos_dp_sw_link_training(struct exynos_dp_device *dp)
 {
-       int retval = 0;
-       int training_finished;
+       int ret = 0, training_finished = 0;
 
        /* Turn off unnecessary lane */
        if (dp->link_train.lane_count == 1)
@@ -688,21 +711,19 @@ static int exynos_dp_sw_link_training(struct exynos_dp_device *dp)
                exynos_dp_set_analog_power_down(dp, CH3_BLOCK, 1);
        }
 
-       training_finished = 0;
-
        dp->link_train.lt_state = START;
 
        /* Process here */
-       while (!training_finished) {
+       while (!ret && !training_finished) {
                switch (dp->link_train.lt_state) {
                case START:
-                       exynos_dp_link_start(dp);
+                       ret = exynos_dp_link_start(dp);
                        break;
                case CLOCK_RECOVERY:
-                       exynos_dp_process_clock_recovery(dp);
+                       ret = exynos_dp_process_clock_recovery(dp);
                        break;
                case EQUALIZER_TRAINING:
-                       exynos_dp_process_equalizer_training(dp);
+                       ret = exynos_dp_process_equalizer_training(dp);
                        break;
                case FINISHED:
                        training_finished = 1;
@@ -711,8 +732,10 @@ static int exynos_dp_sw_link_training(struct exynos_dp_device *dp)
                        return -EREMOTEIO;
                }
        }
+       if (ret)
+               dev_err(dp->dev, "eDP link training failed (%d)\n", ret);
 
-       return retval;
+       return ret;
 }
 
 static int exynos_dp_set_hw_link_train(struct exynos_dp_device *dp,