Merge tag 'pxa-dt-4.7' of https://github.com/rjarzmik/linux into next/dt

This device-tree pxa update brings :
 - pin control nodes for pxa2xx and pxa3xx
 - the LCD controller for pxa2xx
 - the missing pxa3xx pulse width modulator nodes
 - an USB Host fix for pxa3xx

* tag 'pxa-dt-4.7' of https://github.com/rjarzmik/linux:
  ARM: dts: pxa3xx: add pincontrol helpers
  ARM: dts: pxa: add pinctrl to pxa3xx
  ARM: dts: pxa: fix the ohci clock for pxa3xx
  ARM: dts: add pincontroller to pxa27x
  ARM: dts: pxa: add pxa3xx pwm nodes
  ARM: dts: pxa: add pxa framebuffer device

Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 210192c..9e73dc6 100644 (file)
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -22,8 +22,15 @@
                        marvell,intc-nr-irqs = <34>;
                };
 
+               pinctrl: pinctrl@40e00000 {
+                       reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
+                              0x40f00020 0x10>;
+                       compatible = "marvell,pxa27x-pinctrl";
+               };
+
                gpio: gpio@40e00000 {
                        compatible = "intel,pxa27x-gpio";
+                       gpio-ranges = <&pinctrl 0 0 128>;
                        clocks = <&clks CLK_NONE>;
                };
 

diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi
index 5e5af07..3ff077c 100644 (file)
--- a/arch/arm/boot/dts/pxa2xx.dtsi
+++ b/arch/arm/boot/dts/pxa2xx.dtsi
@@ -140,5 +140,13 @@
                        reg = <0x40900000 0x3c>;
                        interrupts = <30 31>;
                };
+
+               lcd-controller@40500000 {
+                       compatible = "marvell,pxa2xx-lcdc";
+                       reg = <0x44000000 0x10000>;
+                       interrupts = <17>;
+                       clocks = <&clks CLK_LCD>;
+                       status = "disabled";
+               };
        };
 };

diff --git a/arch/arm/boot/dts/pxa3xx.dtsi b/arch/arm/boot/dts/pxa3xx.dtsi
index fec47bc..9d6f3aa 100644 (file)
--- a/arch/arm/boot/dts/pxa3xx.dtsi
+++ b/arch/arm/boot/dts/pxa3xx.dtsi
@@ -1,6 +1,96 @@
 /* The pxa3xx skeleton simply augments the 2xx version */
 #include "pxa2xx.dtsi"
 
+#define MFP_PIN_PXA300(gpio)                           \
+       ((gpio <= 2) ? (0x00b4 + 4 * gpio) :            \
+        (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) :     \
+        (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) :    \
+        (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :   \
+        0)
+
+#define MFP_PIN_PXA310(gpio)                           \
+       ((gpio <= 2) ? (0x00b4 + 4 * gpio) :            \
+        (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) :     \
+        (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) :    \
+        (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) :    \
+        (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :   \
+        (gpio <= 262) ? 0 :                            \
+        (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) :  \
+        0)
+
+#define MFP_PIN_PXA320(gpio)                           \
+       ((gpio <= 4) ? (0x0124 + 4 * gpio) :            \
+        (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) :      \
+        (gpio <= 10) ? (0x0458 + 4 * (gpio - 10)) :    \
+        (gpio <= 26) ? (0x02a0 + 4 * (gpio - 11)) :    \
+        (gpio <= 48) ? (0x0400 + 4 * (gpio - 27)) :    \
+        (gpio <= 62) ? (0x045c + 4 * (gpio - 49)) :    \
+        (gpio <= 73) ? (0x04b4 + 4 * (gpio - 63)) :    \
+        (gpio <= 98) ? (0x04f0 + 4 * (gpio - 74)) :    \
+        (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :   \
+        0)
+
+/*
+ * MFP Alternate functions for pins having a gpio.
+ * Example of use: pinctrl-single,pins = < MFP_PIN_PXA310(21) MFP_AF1 >
+ */
+#define MFP_AF0                (0 << 0)
+#define MFP_AF1                (1 << 0)
+#define MFP_AF2                (2 << 0)
+#define MFP_AF3                (3 << 0)
+#define MFP_AF4                (4 << 0)
+#define MFP_AF5                (5 << 0)
+#define MFP_AF6                (6 << 0)
+
+/*
+ * MFP drive strength functions for pins.
+ * Example of use: pinctrl-single,drive-strength = MFP_DS03X;
+ */
+#define MFP_DSMSK      (0x7 << 10)
+#define MFP_DS01X      < (0x0 << 10) MFP_DSMSK >
+#define MFP_DS02X      < (0x1 << 10) MFP_DSMSK >
+#define MFP_DS03X      < (0x2 << 10) MFP_DSMSK >
+#define MFP_DS04X      < (0x3 << 10) MFP_DSMSK >
+#define MFP_DS06X      < (0x4 << 10) MFP_DSMSK >
+#define MFP_DS08X      < (0x5 << 10) MFP_DSMSK >
+#define MFP_DS10X      < (0x6 << 10) MFP_DSMSK >
+#define MFP_DS13X      < (0x7 << 10) MFP_DSMSK >
+
+/*
+ * MFP low power mode for pins.
+ * Example of use:
+ *   pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW|MFP_LPM_EDGE_FALL);
+ *
+ * Table that determines the low power modes outputs, with actual settings
+ * used in parentheses for don't-care values. Except for the float output,
+ * the configured driven and pulled levels match, so if there is a need for
+ * non-LPM pulled output, the same configuration could probably be used.
+ *
+ * Output value  sleep_oe_n  sleep_data  pullup_en  pulldown_en  pull_sel
+ *                 (bit 7)    (bit 8)    (bit 14)     (bit 13)   (bit 15)
+ *
+ * Input            0          X(0)        X(0)        X(0)       0
+ * Drive 0          0          0           0           X(1)       0
+ * Drive 1          0          1           X(1)        0         0
+ * Pull hi (1)      1          X(1)        1           0         0
+ * Pull lo (0)      1          X(0)        0           1         0
+ * Z (float)        1          X(0)        0           0         0
+ */
+#define MFP_LPM(x)             < (x) MFP_LPM_MSK >
+
+#define MFP_LPM_MSK            0xe1f0
+#define MFP_LPM_INPUT          0x0000
+#define MFP_LPM_DRIVE_LOW      0x2000
+#define MFP_LPM_DRIVE_HIGH     0x4100
+#define MFP_LPM_PULL_LOW       0x2080
+#define MFP_LPM_PULL_HIGH      0x4180
+#define MFP_LPM_FLOAT          0x0080
+
+#define MFP_LPM_EDGE_NONE      0x0000
+#define MFP_LPM_EDGE_RISE      0x0010
+#define MFP_LPM_EDGE_FALL      0x0020
+#define MFP_LPM_EDGE_BOTH      0x0030
+
 / {
        model = "Marvell PXA3xx familiy SoC";
        compatible = "marvell,pxa3xx";
@@ -43,6 +133,15 @@
                        marvell,intc-nr-irqs = <56>;
                };
 
+               pinctrl: pinctrl@40e10000 {
+                       compatible = "pinconf-single";
+                       reg = <0x40e10000 0xffff>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-single,register-width = <32>;
+                       pinctrl-single,function-mask = <0x7>;
+               };
+
                gpio: gpio@40e00000 {
                        compatible = "intel,pxa3xx-gpio";
                        reg = <0x40e00000 0x10000>;
@@ -92,7 +191,39 @@
                        compatible = "marvell,pxa-ohci";
                        reg = <0x4c000000 0x10000>;
                        interrupts = <3>;
-                       clocks = <&clks CLK_USBHOST>;
+                       clocks = <&clks CLK_USBH>;
+                       status = "disabled";
+               };
+
+               pwm0: pwm@40b00000 {
+                       compatible = "marvell,pxa270-pwm";
+                       reg = <0x40b00000 0x10>;
+                       #pwm-cells = <1>;
+                       clocks = <&clks CLK_PWM0>;
+                       status = "disabled";
+               };
+
+               pwm1: pwm@40b00010 {
+                       compatible = "marvell,pxa270-pwm";
+                       reg = <0x40b00010 0x10>;
+                       #pwm-cells = <1>;
+                       clocks = <&clks CLK_PWM1>;
+                       status = "disabled";
+               };
+
+               pwm2: pwm@40c00000 {
+                       compatible = "marvell,pxa270-pwm";
+                       reg = <0x40c00000 0x10>;
+                       #pwm-cells = <1>;
+                       clocks = <&clks CLK_PWM0>;
+                       status = "disabled";
+               };
+
+               pwm3: pwm@40c00010 {
+                       compatible = "marvell,pxa270-pwm";
+                       reg = <0x40c00010 0x10>;
+                       #pwm-cells = <1>;
+                       clocks = <&clks CLK_PWM1>;
                        status = "disabled";
                };
        };