ARM: dts: r8a7792: add DU clocks
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Fri, 5 Aug 2016 18:25:47 +0000 (21:25 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 9 Aug 2016 12:37:46 +0000 (14:37 +0200)
Describe the DU0/1 clocks and their parent, ZX clock in the R8A7792 device
tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7792.dtsi

index eaa0c48..7e0c57f 100644 (file)
                        clock-div = <2>;
                        clock-mult = <1>;
                };
+               zx_clk: zx {
+                       compatible = "fixed-factor-clock";
+                       clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+                       #clock-cells = <0>;
+                       clock-div = <3>;
+                       clock-mult = <1>;
+               };
                zs_clk: zs {
                        compatible = "fixed-factor-clock";
                        clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
                                     "renesas,cpg-mstp-clocks";
                        reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
                        clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>,
-                                <&p_clk>, <&p_clk>;
+                                <&p_clk>, <&p_clk>, <&zx_clk>, <&zx_clk>;
                        #clock-cells = <1>;
                        clock-indices = <
                                R8A7792_CLK_HSCIF1 R8A7792_CLK_HSCIF0
                                R8A7792_CLK_SCIF3 R8A7792_CLK_SCIF2
                                R8A7792_CLK_SCIF1 R8A7792_CLK_SCIF0
+                               R8A7792_CLK_DU1 R8A7792_CLK_DU0
                        >;
                        clock-output-names = "hscif1", "hscif0", "scif3",
-                                            "scif2", "scif1", "scif0";
+                                            "scif2", "scif1", "scif0",
+                                            "du1", "du0";
                };
                mstp8_clks: mstp8_clks@e6150990 {
                        compatible = "renesas,r8a7792-mstp-clocks",