pinctrl: single: Use a separate lockdep class
authorSudeep Holla <sudeep.holla@arm.com>
Mon, 1 Feb 2016 18:28:17 +0000 (18:28 +0000)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 11 Mar 2016 16:03:06 +0000 (23:03 +0700)
The single pinmux controller can be cascaded to the other interrupt
controllers. Hence when propagating wake-up settings to its parent
interrupt controller, there's possiblity of detecting possible recursive
locking and getting lockdep warning.

This patch avoids this false positive by using a separate lockdep class
for this single pinctrl interrupts.

Cc: linux-gpio@vger.kernel.org
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-single.c

index d24e5f1..fb126d5 100644 (file)
@@ -254,6 +254,13 @@ static enum pin_config_param pcs_bias[] = {
        PIN_CONFIG_BIAS_PULL_UP,
 };
 
+/*
+ * This lock class tells lockdep that irqchip core that this single
+ * pinctrl can be in a different category than its parents, so it won't
+ * report false recursion.
+ */
+static struct lock_class_key pcs_lock_class;
+
 /*
  * REVISIT: Reads and writes could eventually use regmap or something
  * generic. But at least on omaps, some mux registers are performance
@@ -1713,6 +1720,7 @@ static int pcs_irqdomain_map(struct irq_domain *d, unsigned int irq,
        irq_set_chip_data(irq, pcs_soc);
        irq_set_chip_and_handler(irq, &pcs->chip,
                                 handle_level_irq);
+       irq_set_lockdep_class(irq, &pcs_lock_class);
        irq_set_noprobe(irq);
 
        return 0;