e1000: Neaten e1000_config_dsp_after_link_change
authorJoe Perches <joe@perches.com>
Fri, 10 Feb 2012 12:07:36 +0000 (12:07 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Fri, 24 Feb 2012 10:02:13 +0000 (02:02 -0800)
Separate a complicated bit of e1000_config_dsp_after_link_change
into a new static function e1000_1000Mb_check_cable_length.

Reduces indentation and adds a bit of clarity.

Signed-off-by: Joe Perches <joe@perches.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/e1000/e1000_hw.c

index 36ee76b..c526279 100644 (file)
@@ -5253,6 +5253,78 @@ static s32 e1000_check_downshift(struct e1000_hw *hw)
        return E1000_SUCCESS;
 }
 
+static const u16 dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = {
+       IGP01E1000_PHY_AGC_PARAM_A,
+       IGP01E1000_PHY_AGC_PARAM_B,
+       IGP01E1000_PHY_AGC_PARAM_C,
+       IGP01E1000_PHY_AGC_PARAM_D
+};
+
+static s32 e1000_1000Mb_check_cable_length(struct e1000_hw *hw)
+{
+       u16 min_length, max_length;
+       u16 phy_data, i;
+       s32 ret_val;
+
+       ret_val = e1000_get_cable_length(hw, &min_length, &max_length);
+       if (ret_val)
+               return ret_val;
+
+       if (hw->dsp_config_state != e1000_dsp_config_enabled)
+               return 0;
+
+       if (min_length >= e1000_igp_cable_length_50) {
+               for (i = 0; i < IGP01E1000_PHY_CHANNEL_NUM; i++) {
+                       ret_val = e1000_read_phy_reg(hw, dsp_reg_array[i],
+                                                    &phy_data);
+                       if (ret_val)
+                               return ret_val;
+
+                       phy_data &= ~IGP01E1000_PHY_EDAC_MU_INDEX;
+
+                       ret_val = e1000_write_phy_reg(hw, dsp_reg_array[i],
+                                                     phy_data);
+                       if (ret_val)
+                               return ret_val;
+               }
+               hw->dsp_config_state = e1000_dsp_config_activated;
+       } else {
+               u16 ffe_idle_err_timeout = FFE_IDLE_ERR_COUNT_TIMEOUT_20;
+               u32 idle_errs = 0;
+
+               /* clear previous idle error counts */
+               ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
+               if (ret_val)
+                       return ret_val;
+
+               for (i = 0; i < ffe_idle_err_timeout; i++) {
+                       udelay(1000);
+                       ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS,
+                                                    &phy_data);
+                       if (ret_val)
+                               return ret_val;
+
+                       idle_errs += (phy_data & SR_1000T_IDLE_ERROR_CNT);
+                       if (idle_errs > SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT) {
+                               hw->ffe_config_state = e1000_ffe_config_active;
+
+                               ret_val = e1000_write_phy_reg(hw,
+                                             IGP01E1000_PHY_DSP_FFE,
+                                             IGP01E1000_PHY_DSP_FFE_CM_CP);
+                               if (ret_val)
+                                       return ret_val;
+                               break;
+                       }
+
+                       if (idle_errs)
+                               ffe_idle_err_timeout =
+                                           FFE_IDLE_ERR_COUNT_TIMEOUT_100;
+               }
+       }
+
+       return 0;
+}
+
 /**
  * e1000_config_dsp_after_link_change
  * @hw: Struct containing variables accessed by shared code
@@ -5269,13 +5341,6 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
 {
        s32 ret_val;
        u16 phy_data, phy_saved_data, speed, duplex, i;
-       static const u16 dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = {
-              IGP01E1000_PHY_AGC_PARAM_A,
-              IGP01E1000_PHY_AGC_PARAM_B,
-              IGP01E1000_PHY_AGC_PARAM_C,
-              IGP01E1000_PHY_AGC_PARAM_D
-       };
-       u16 min_length, max_length;
 
        e_dbg("e1000_config_dsp_after_link_change");
 
@@ -5290,84 +5355,9 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
                }
 
                if (speed == SPEED_1000) {
-
-                       ret_val =
-                           e1000_get_cable_length(hw, &min_length,
-                                                  &max_length);
+                       ret_val = e1000_1000Mb_check_cable_length(hw);
                        if (ret_val)
                                return ret_val;
-
-                       if ((hw->dsp_config_state == e1000_dsp_config_enabled)
-                           && min_length >= e1000_igp_cable_length_50) {
-
-                               for (i = 0; i < IGP01E1000_PHY_CHANNEL_NUM; i++) {
-                                       ret_val =
-                                           e1000_read_phy_reg(hw,
-                                                              dsp_reg_array[i],
-                                                              &phy_data);
-                                       if (ret_val)
-                                               return ret_val;
-
-                                       phy_data &=
-                                           ~IGP01E1000_PHY_EDAC_MU_INDEX;
-
-                                       ret_val =
-                                           e1000_write_phy_reg(hw,
-                                                               dsp_reg_array
-                                                               [i], phy_data);
-                                       if (ret_val)
-                                               return ret_val;
-                               }
-                               hw->dsp_config_state =
-                                   e1000_dsp_config_activated;
-                       }
-
-                       if ((hw->ffe_config_state == e1000_ffe_config_enabled)
-                           && (min_length < e1000_igp_cable_length_50)) {
-
-                               u16 ffe_idle_err_timeout =
-                                   FFE_IDLE_ERR_COUNT_TIMEOUT_20;
-                               u32 idle_errs = 0;
-
-                               /* clear previous idle error counts */
-                               ret_val =
-                                   e1000_read_phy_reg(hw, PHY_1000T_STATUS,
-                                                      &phy_data);
-                               if (ret_val)
-                                       return ret_val;
-
-                               for (i = 0; i < ffe_idle_err_timeout; i++) {
-                                       udelay(1000);
-                                       ret_val =
-                                           e1000_read_phy_reg(hw,
-                                                              PHY_1000T_STATUS,
-                                                              &phy_data);
-                                       if (ret_val)
-                                               return ret_val;
-
-                                       idle_errs +=
-                                           (phy_data &
-                                            SR_1000T_IDLE_ERROR_CNT);
-                                       if (idle_errs >
-                                           SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT)
-                                       {
-                                               hw->ffe_config_state =
-                                                   e1000_ffe_config_active;
-
-                                               ret_val =
-                                                   e1000_write_phy_reg(hw,
-                                                                       IGP01E1000_PHY_DSP_FFE,
-                                                                       IGP01E1000_PHY_DSP_FFE_CM_CP);
-                                               if (ret_val)
-                                                       return ret_val;
-                                               break;
-                                       }
-
-                                       if (idle_errs)
-                                               ffe_idle_err_timeout =
-                                                   FFE_IDLE_ERR_COUNT_TIMEOUT_100;
-                               }
-                       }
                }
        } else {
                if (hw->dsp_config_state == e1000_dsp_config_activated) {