dmaengine: cppi41: Prepare to add PM runtime support
authorTony Lindgren <tony@atomide.com>
Fri, 19 Aug 2016 22:59:39 +0000 (15:59 -0700)
committerVinod Koul <vinod.koul@intel.com>
Wed, 31 Aug 2016 04:52:19 +0000 (10:22 +0530)
Let's just move code from cppi41_dma_issue_pending() to
push_desc_queue() as that's the only call to push_desc_queue().

We want to do this for PM runtime as we need to call push_desc_queue()
also for pending queued transfers from PM runtime resume.

No functional changes, just moves code around.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
drivers/dma/cppi41.c

index 4b23174..cf0415e 100644 (file)
@@ -386,21 +386,6 @@ static void push_desc_queue(struct cppi41_channel *c)
        u32 desc_phys;
        u32 reg;
 
-       desc_phys = lower_32_bits(c->desc_phys);
-       desc_num = (desc_phys - cdd->descs_phys) / sizeof(struct cppi41_desc);
-       WARN_ON(cdd->chan_busy[desc_num]);
-       cdd->chan_busy[desc_num] = c;
-
-       reg = (sizeof(struct cppi41_desc) - 24) / 4;
-       reg |= desc_phys;
-       cppi_writel(reg, cdd->qmgr_mem + QMGR_QUEUE_D(c->q_num));
-}
-
-static void cppi41_dma_issue_pending(struct dma_chan *chan)
-{
-       struct cppi41_channel *c = to_cpp41_chan(chan);
-       u32 reg;
-
        c->residue = 0;
 
        reg = GCR_CHAN_ENABLE;
@@ -418,6 +403,21 @@ static void cppi41_dma_issue_pending(struct dma_chan *chan)
         * before starting the dma engine.
         */
        __iowmb();
+
+       desc_phys = lower_32_bits(c->desc_phys);
+       desc_num = (desc_phys - cdd->descs_phys) / sizeof(struct cppi41_desc);
+       WARN_ON(cdd->chan_busy[desc_num]);
+       cdd->chan_busy[desc_num] = c;
+
+       reg = (sizeof(struct cppi41_desc) - 24) / 4;
+       reg |= desc_phys;
+       cppi_writel(reg, cdd->qmgr_mem + QMGR_QUEUE_D(c->q_num));
+}
+
+static void cppi41_dma_issue_pending(struct dma_chan *chan)
+{
+       struct cppi41_channel *c = to_cpp41_chan(chan);
+
        push_desc_queue(c);
 }