arm: exynos5: INT ASV Lock Bit implementation

If INT ASV lock bit is configured, all voltages in the INT ASV table
have to be increased by 25mV.

BUG=chrome-os-partner:16615
TEST=Compile and boot kernel, cannot test
the exact changes till we get the new chip.

Change-Id: I64ec69874bd4753b61efd46708cdf82046310dd2
Signed-off-by: Arjun.K.V <arjun.kv@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/39466
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>

diff --git a/arch/arm/mach-exynos/busfreq_opp_5250.c b/arch/arm/mach-exynos/busfreq_opp_5250.c
index 9f08683..d0c9af1 100644 (file)
--- a/arch/arm/mach-exynos/busfreq_opp_5250.c
+++ b/arch/arm/mach-exynos/busfreq_opp_5250.c
@@ -44,6 +44,7 @@
 #define ASV_GROUP_10   10
 #define ASV_GROUP_12   12
 #define MIF_ASV_GROUP  3
+#define INT_ASV_VOL_OFFSET     25000
 
 static struct clk *mout_bpll;
 static struct clk *mout_mpll;
@@ -487,6 +488,10 @@ static void exynos5250_set_bus_volt(void)
                else if (exynos_lot_id)
                        exynos5_busfreq_table_int[i].volt =
                                exynos5_int_volt_orig[asv_group_index][i];
+               else if (int_vol_lock)
+                       exynos5_busfreq_table_int[i].volt =
+                               exynos5_int_volt[asv_group_index][i] +
+                                                       INT_ASV_VOL_OFFSET;
                else
                        exynos5_busfreq_table_int[i].volt =
                                exynos5_int_volt[asv_group_index][i];

diff --git a/arch/arm/mach-exynos/include/mach/busfreq_exynos5.h b/arch/arm/mach-exynos/include/mach/busfreq_exynos5.h
index def54ad..d328839 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/busfreq_exynos5.h
+++ b/arch/arm/mach-exynos/include/mach/busfreq_exynos5.h
@@ -27,6 +27,7 @@ extern unsigned int exynos_result_of_asv;
 extern unsigned int exynos_result_mif_asv;
 extern bool exynos_lot_id;
 extern bool exynos_lot_is_nzvpu;
+extern bool int_vol_lock;
 
 enum busfreq_level_idx {
        LV_0,