powerpc/irq: Add support for HV virtualization interrupts
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 8 Jul 2016 06:37:06 +0000 (16:37 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Sun, 17 Jul 2016 06:42:44 +0000 (16:42 +1000)
This will be delivering external interrupts from the XIVE to the
Hypervisor. We treat it as a normal external interrupt for the
lazy irq disable code (so it will be replayed as a 0x500) and
route it to do_IRQ.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/exception-64s.h
arch/powerpc/include/asm/reg.h
arch/powerpc/kernel/cpu_setup_power.S
arch/powerpc/kernel/exceptions-64s.S

index 93ae809..c7d2773 100644 (file)
@@ -403,6 +403,8 @@ label##_relon_hv:                                           \
 #define SOFTEN_VALUE_0xe82     PACA_IRQ_DBELL
 #define SOFTEN_VALUE_0xe60     PACA_IRQ_HMI
 #define SOFTEN_VALUE_0xe62     PACA_IRQ_HMI
+#define SOFTEN_VALUE_0xea0     PACA_IRQ_EE
+#define SOFTEN_VALUE_0xea2     PACA_IRQ_EE
 
 #define __SOFTEN_TEST(h, vec)                                          \
        lbz     r10,PACASOFTIRQEN(r13);                                 \
index c0263a2..6de6abe 100644 (file)
 #define   LPCR_LPES1   0x00000004      /* LPAR Env selector 1 */
 #define   LPCR_LPES_SH 2
 #define   LPCR_RMI     0x00000002      /* real mode is cache inhibit */
+#define   LPCR_HVICE   0x00000002      /* P9: HV interrupt enable */
 #define   LPCR_HDICE   0x00000001      /* Hyp Decr enable (HV,PR,EE) */
 #define   LPCR_UPRT    0x00400000      /* Use Process Table (ISA 3) */
 #ifndef SPRN_LPID
index ec8a228..52ff3f0 100644 (file)
@@ -99,6 +99,7 @@ _GLOBAL(__setup_cpu_power9)
        mtspr   SPRN_LPID,r0
        mfspr   r3,SPRN_LPCR
        ori     r3, r3, LPCR_PECEDH
+       ori     r3, r3, LPCR_HVICE
        bl      __init_LPCR
        bl      __init_HFSCR
        bl      __init_tlb_power9
@@ -118,6 +119,7 @@ _GLOBAL(__restore_cpu_power9)
        mtspr   SPRN_LPID,r0
        mfspr   r3,SPRN_LPCR
        ori     r3, r3, LPCR_PECEDH
+       ori     r3, r3, LPCR_HVICE
        bl      __init_LPCR
        bl      __init_HFSCR
        bl      __init_tlb_power9
index 3834031..6200e49 100644 (file)
@@ -331,6 +331,12 @@ hv_doorbell_trampoline:
        EXCEPTION_PROLOG_0(PACA_EXGEN)
        b       h_doorbell_hv
 
+       . = 0xea0
+hv_virt_irq_trampoline:
+       SET_SCRATCH0(r13)
+       EXCEPTION_PROLOG_0(PACA_EXGEN)
+       b       h_virt_irq_hv
+
        /* We need to deal with the Altivec unavailable exception
         * here which is at 0xf20, thus in the middle of the
         * prolog code of the PerformanceMonitor one. A little
@@ -581,6 +587,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
        MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
        KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
 
+       MASKABLE_EXCEPTION_HV_OOL(0xea2, h_virt_irq)
+       KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xea2)
+
        /* moved from 0xf00 */
        STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
        KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00)
@@ -660,6 +669,8 @@ _GLOBAL(__replay_interrupt)
 BEGIN_FTR_SECTION
        cmpwi   r3,0xe80
        beq     h_doorbell_common
+       cmpwi   r3,0xea0
+       beq     h_virt_irq_common
 FTR_SECTION_ELSE
        cmpwi   r3,0xa00
        beq     doorbell_super_common
@@ -734,6 +745,7 @@ kvmppc_skip_Hinterrupt:
 #else
        STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception)
 #endif
+       STD_EXCEPTION_COMMON_ASYNC(0xea0, h_virt_irq, do_IRQ)
        STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception)
        STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception)
        STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception)
@@ -852,6 +864,12 @@ h_doorbell_relon_trampoline:
        EXCEPTION_PROLOG_0(PACA_EXGEN)
        b       h_doorbell_relon_hv
 
+       . = 0x4ea0
+h_virt_irq_relon_trampoline:
+       SET_SCRATCH0(r13)
+       EXCEPTION_PROLOG_0(PACA_EXGEN)
+       b       h_virt_irq_relon_hv
+
        . = 0x4f00
 performance_monitor_relon_pseries_trampoline:
        SET_SCRATCH0(r13)
@@ -1109,6 +1127,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
        /* Equivalents to the above handlers for relocation-on interrupt vectors */
        STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
        MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
+       MASKABLE_RELON_EXCEPTION_HV_OOL(0xea0, h_virt_irq)
 
        STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
        STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)