},
};
-int s5m_reg_read(struct s5m87xx_dev *s5m87xx, u8 reg, void *dest)
-{
- return regmap_read(s5m87xx->regmap, reg, dest);
-}
-EXPORT_SYMBOL_GPL(s5m_reg_read);
-
-int s5m_bulk_read(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf)
-{
- return regmap_bulk_read(s5m87xx->regmap, reg, buf, count);
-}
-EXPORT_SYMBOL_GPL(s5m_bulk_read);
-
-int s5m_reg_write(struct s5m87xx_dev *s5m87xx, u8 reg, u8 value)
-{
- return regmap_write(s5m87xx->regmap, reg, value);
-}
-EXPORT_SYMBOL_GPL(s5m_reg_write);
-
-int s5m_bulk_write(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf)
-{
- return regmap_raw_write(s5m87xx->regmap, reg, buf, count);
-}
-EXPORT_SYMBOL_GPL(s5m_bulk_write);
-
-int s5m_reg_update(struct s5m87xx_dev *s5m87xx, u8 reg, u8 val, u8 mask)
-{
- return regmap_update_bits(s5m87xx->regmap, reg, mask, val);
-}
-EXPORT_SYMBOL_GPL(s5m_reg_update);
-
static struct regmap_config s5m_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
if (!s5m87xx->pdata->low_jitter)
return 0;
- return s5m_reg_update(s5m87xx, S5M8767_REG_CTRL1,
- S5M8767_LOW_JITTER_MASK,
- S5M8767_LOW_JITTER_MASK);
+ return regmap_update_bits(s5m87xx->pmic, S5M8767_REG_CTRL1,
+ S5M8767_LOW_JITTER_MASK,
+ S5M8767_LOW_JITTER_MASK);
}
static int __devinit s5m87xx_i2c_probe(struct i2c_client *i2c,
{
struct s5m_platform_data *pdata = i2c->dev.platform_data;
struct s5m87xx_dev *s5m87xx;
+ struct i2c_client *rtc_i2c = NULL;
int ret;
s5m87xx = devm_kzalloc(&i2c->dev, sizeof(struct s5m87xx_dev),
i2c_set_clientdata(i2c, s5m87xx);
s5m87xx->dev = &i2c->dev;
- s5m87xx->i2c = i2c;
s5m87xx->irq = i2c->irq;
s5m87xx->type = s5m87xx_i2c_get_driver_data(i2c, id);
s5m87xx->wakeup = pdata->wakeup;
#endif
- s5m87xx->regmap = regmap_init_i2c(i2c, &s5m_regmap_config);
- if (IS_ERR(s5m87xx->regmap)) {
- ret = PTR_ERR(s5m87xx->regmap);
+ s5m87xx->pmic = regmap_init_i2c(i2c, &s5m_regmap_config);
+ if (IS_ERR(s5m87xx->pmic)) {
+ ret = PTR_ERR(s5m87xx->pmic);
dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
ret);
goto err;
}
- s5m87xx->rtc = i2c_new_dummy(i2c->adapter, RTC_I2C_ADDR);
- i2c_set_clientdata(s5m87xx->rtc, s5m87xx);
+ rtc_i2c = i2c_new_dummy(i2c->adapter, RTC_I2C_ADDR);
+ i2c_set_clientdata(rtc_i2c, s5m87xx);
+ s5m87xx->rtc = regmap_init_i2c(rtc_i2c, &s5m_regmap_config);
+ if (IS_ERR(s5m87xx->rtc)) {
+ ret = PTR_ERR(s5m87xx->rtc);
+ dev_err(&rtc_i2c->dev, "Failed to allocate register map: %d\n",
+ ret);
+ goto err;
+ }
if (pdata && pdata->cfg_pmic_irq)
pdata->cfg_pmic_irq();
err:
mfd_remove_devices(s5m87xx->dev);
s5m_irq_exit(s5m87xx);
- i2c_unregister_device(s5m87xx->rtc);
- regmap_exit(s5m87xx->regmap);
+ if (rtc_i2c)
+ i2c_unregister_device(rtc_i2c);
+ regmap_exit(s5m87xx->pmic);
+ regmap_exit(s5m87xx->rtc);
return ret;
}
mfd_remove_devices(s5m87xx->dev);
s5m_irq_exit(s5m87xx);
- i2c_unregister_device(s5m87xx->rtc);
- regmap_exit(s5m87xx->regmap);
+ regmap_exit(s5m87xx->pmic);
+ regmap_exit(s5m87xx->rtc);
return 0;
}
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <linux/regmap.h>
#include <linux/mfd/s5m87xx/s5m-core.h>
struct s5m_irq_data {
for (i = 0; i < ARRAY_SIZE(s5m87xx->irq_masks_cur); i++) {
if (s5m87xx->irq_masks_cur[i] != s5m87xx->irq_masks_cache[i]) {
s5m87xx->irq_masks_cache[i] = s5m87xx->irq_masks_cur[i];
- s5m_reg_write(s5m87xx, S5M8767_REG_INT1M + i,
- s5m87xx->irq_masks_cur[i]);
+ regmap_write(s5m87xx->pmic, S5M8767_REG_INT1M + i,
+ s5m87xx->irq_masks_cur[i]);
}
}
for (i = 0; i < ARRAY_SIZE(s5m87xx->irq_masks_cur); i++) {
if (s5m87xx->irq_masks_cur[i] != s5m87xx->irq_masks_cache[i]) {
s5m87xx->irq_masks_cache[i] = s5m87xx->irq_masks_cur[i];
- s5m_reg_write(s5m87xx, S5M8763_REG_IRQM1 + i,
- s5m87xx->irq_masks_cur[i]);
+ regmap_write(s5m87xx->pmic, S5M8763_REG_IRQM1 + i,
+ s5m87xx->irq_masks_cur[i]);
}
}
int i;
- ret = s5m_bulk_read(s5m87xx, S5M8767_REG_INT1,
- NUM_IRQ_REGS - 1, irq_reg);
+ ret = regmap_bulk_read(s5m87xx->pmic, S5M8767_REG_INT1,
+ irq_reg, NUM_IRQ_REGS - 1);
if (ret < 0) {
dev_err(s5m87xx->dev, "Failed to read interrupt register: %d\n",
ret);
int ret;
int i;
- ret = s5m_bulk_read(s5m87xx, S5M8763_REG_IRQ1,
- NUM_IRQ_REGS, irq_reg);
+ ret = regmap_bulk_read(s5m87xx->pmic, S5M8763_REG_IRQ1,
+ irq_reg, NUM_IRQ_REGS);
if (ret < 0) {
dev_err(s5m87xx->dev, "Failed to read interrupt register: %d\n",
ret);
for (i = 0; i < NUM_IRQ_REGS; i++) {
s5m87xx->irq_masks_cur[i] = 0xff;
s5m87xx->irq_masks_cache[i] = 0xff;
- s5m_reg_write(s5m87xx, S5M8763_REG_IRQM1 + i,
- 0xff);
+ regmap_write(s5m87xx->pmic, S5M8763_REG_IRQM1 + i,
+ 0xff);
}
- s5m_reg_write(s5m87xx, S5M8763_REG_STATUSM1, 0xff);
- s5m_reg_write(s5m87xx, S5M8763_REG_STATUSM2, 0xff);
+ regmap_write(s5m87xx->pmic, S5M8763_REG_STATUSM1, 0xff);
+ regmap_write(s5m87xx->pmic, S5M8763_REG_STATUSM2, 0xff);
for (i = 0; i < S5M8763_IRQ_NR; i++) {
cur_irq = i + s5m87xx->irq_base;
for (i = 0; i < NUM_IRQ_REGS - 1; i++) {
s5m87xx->irq_masks_cur[i] = 0xff;
s5m87xx->irq_masks_cache[i] = 0xff;
- s5m_reg_write(s5m87xx, S5M8767_REG_INT1M + i,
- 0xff);
+ regmap_write(s5m87xx->pmic, S5M8767_REG_INT1M + i,
+ 0xff);
}
for (i = 0; i < S5M8767_IRQ_NR; i++) {
cur_irq = i + s5m87xx->irq_base;
#include <linux/gpio.h>
#include <linux/slab.h>
#include <linux/module.h>
+#include <linux/regmap.h>
#include <linux/platform_device.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
else if (ret)
return ret;
- ret = s5m_reg_read(s5m8767->iodev, reg, &val);
+ ret = regmap_read(s5m8767->iodev->pmic, reg, &val);
if (ret)
return ret;
if (ret)
return ret;
- return s5m_reg_update(s5m8767->iodev, reg, pattern, mask);
+ return regmap_update_bits(s5m8767->iodev->pmic, reg, mask, pattern);
}
static int s5m8767_reg_disable(struct regulator_dev *rdev)
if (ret)
return ret;
- return s5m_reg_update(s5m8767->iodev, reg, ~mask, mask);
+ return regmap_update_bits(s5m8767->iodev->pmic, reg, mask, ~mask);
}
static int s5m8767_get_voltage_register(struct regulator_dev *rdev, int *_reg)
mask = (reg_id < S5M8767_BUCK1) ? 0x3f : 0xff;
- ret = s5m_reg_read(s5m8767->iodev, reg, &val);
+ ret = regmap_read(s5m8767->iodev->pmic, reg, &val);
if (ret)
return ret;
if (ret)
return ret;
- s5m_reg_read(s5m8767->iodev, reg, &val);
+ regmap_read(s5m8767->iodev->pmic, reg, &val);
val &= ~mask;
val |= sel;
- ret = s5m_reg_write(s5m8767->iodev, reg, val);
+ ret = regmap_write(s5m8767->iodev->pmic, reg, val);
*selector = sel;
return ret;
}
}
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
- (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1), 1 << 1);
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
- (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1), 1 << 1);
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
- (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1), 1 << 1);
+ regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK2CTRL, 1 << 1,
+ (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
+ regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK3CTRL, 1 << 1,
+ (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
+ regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK4CTRL, 1 << 1,
+ (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
/* Initialize GPIO DVS registers */
for (i = 0; i < 8; i++) {
if (s5m8767->buck2_gpiodvs) {
- s5m_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
- s5m8767->buck2_vol[i]);
+ regmap_write(s5m8767->iodev->pmic,
+ S5M8767_REG_BUCK2DVS1 + i,
+ s5m8767->buck2_vol[i]);
}
if (s5m8767->buck3_gpiodvs) {
- s5m_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
- s5m8767->buck3_vol[i]);
+ regmap_write(s5m8767->iodev->pmic,
+ S5M8767_REG_BUCK3DVS1 + i,
+ s5m8767->buck3_vol[i]);
}
if (s5m8767->buck4_gpiodvs) {
- s5m_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
- s5m8767->buck4_vol[i]);
+ regmap_write(s5m8767->iodev->pmic,
+ S5M8767_REG_BUCK4DVS1 + i,
+ s5m8767->buck4_vol[i]);
}
}
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL, 0x78, 0xff);
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL, 0x58, 0xff);
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL, 0x78, 0xff);
+ regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK2CTRL,
+ 0xff, 0x78);
+ regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK3CTRL,
+ 0xff, 0x58);
+ regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK4CTRL,
+ 0xff, 0x78);
if (s5m8767->buck2_ramp)
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
+ regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_DVSRAMP,
+ 0x08, 0x08);
if (s5m8767->buck3_ramp)
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
+ regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_DVSRAMP,
+ 0x04, 0x04);
if (s5m8767->buck4_ramp)
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
+ regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_DVSRAMP,
+ 0x02, 0x02);
if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
|| s5m8767->buck4_ramp) {
switch (s5m8767->ramp_delay) {
case 15:
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
- 0xc0, 0xf0);
+ regmap_update_bits(s5m8767->iodev->pmic,
+ S5M8767_REG_DVSRAMP, 0xf0, 0xc0);
break;
case 25:
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
- 0xd0, 0xf0);
+ regmap_update_bits(s5m8767->iodev->pmic,
+ S5M8767_REG_DVSRAMP, 0xf0, 0xd0);
break;
case 50:
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
- 0xe0, 0xf0);
+ regmap_update_bits(s5m8767->iodev->pmic,
+ S5M8767_REG_DVSRAMP, 0xf0, 0xe0);
break;
case 100:
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
- 0xf0, 0xf0);
+ regmap_update_bits(s5m8767->iodev->pmic,
+ S5M8767_REG_DVSRAMP, 0xf0, 0xf0);
break;
default:
- s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
- 0x90, 0xf0);
+ regmap_update_bits(s5m8767->iodev->pmic,
+ S5M8767_REG_DVSRAMP, 0xf0, 0x90);
}
}
/**
* struct s5m87xx_dev - s5m87xx master device for sub-drivers
* @dev: master device of the chip (can be used to access platform data)
- * @i2c: i2c client private data for regulator
- * @rtc: i2c client private data for rtc
- * @iolock: mutex for serializing io access
+ * @pmic: regmap private data for pmic regulators
+ * @rtc: regmap private data for rtc
* @irqlock: mutex for buslock
* @irq_base: base IRQ number for s5m87xx, required for IRQs
* @irq: generic IRQ number for s5m87xx
*/
struct s5m87xx_dev {
struct device *dev;
- struct regmap *regmap;
- struct i2c_client *i2c;
- struct i2c_client *rtc;
- struct mutex iolock;
+ struct regmap *pmic;
+ struct regmap *rtc;
struct mutex irqlock;
int device_type;
void s5m_irq_exit(struct s5m87xx_dev *s5m87xx);
int s5m_irq_resume(struct s5m87xx_dev *s5m87xx);
-extern int s5m_reg_read(struct s5m87xx_dev *s5m87xx, u8 reg, void *dest);
-extern int s5m_bulk_read(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf);
-extern int s5m_reg_write(struct s5m87xx_dev *s5m87xx, u8 reg, u8 value);
-extern int s5m_bulk_write(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf);
-extern int s5m_reg_update(struct s5m87xx_dev *s5m87xx, u8 reg, u8 val, u8 mask);
-
struct s5m_platform_data {
struct s5m_regulator_data *regulators;
int device_type;